Service manual

Schematic Diagrams
B - 52 V1.0 Power on SEQ Diagram
B.Schematic Diagrams
V1.0 Power on SEQ Diagram
Sheet 51 of 55
V1.0 Power on SEQ
Diagram
2. 76 2m s
2.762ms
2. 59 ms
1.54ms
640us
2.08ms
ri se =3 18 us
416us
1.17ms
378us
80 4u s
370ms(t16)
rise=488us
rise=172us
ri se =5 69 us
5.7ms
5.7ms
4.9ms(t20)
5.7ms
rise=1.148ms
1.1 28ms
1.744 ms
72ms
rise=1.020ms
212ms 140ms
3. 15 ms
PM_DRAM_PWRGD
3.3V
1.8 VS
SUS C#
ri se =1 .2 7m s
3.3 VS
SUS_PWR_ACK
1.8VS_PWRGD
2.388ms
DE LA Y_ PW R GD
VTT_ M EM
50 us (t 09 )
VCORE_ON
DDR1.5V_PWRGD
CLKEN#
98 ms
X8100 EVT POWER ON SEQUENCE V1.0
DD_ ON
SYS_ PW R OK
Bios: 1.00.E1
EC: 1.00.E1b-TEST
Test date: 2009/7/21
B
UF PLT RST#
5VS
SUS B#
rise=756us
ALL_SYS_PWRGD
1.649ms
5V
H_CPUPWRGD
rise=248us
1.1V S_ V TT
1.5 V
1. 76 ms
M_B TN #
SB_PWROK
1.5 VS
1.1VS_VTT_EN
PWR_BTN#
1.1VS_VTT_PWRGD
RSMR S T#
1.5VS_PWRGD
PM_M PW R OK
0ms( t05 )
AC_PRESENT_R
ri se =3 56 us
VCO RE
0~ 20 0m s, PA SS
0~200ms,PASS
73 .6ms (t 02)
74ms
72ms(t26)
44ms(t23)
1.09V
392us
79 0m V
>1ms,PASS
>1ms,PASS
3~ 20 ms ,P AS S
>99ms,PASS
>3 0u s, PA SS
>10ms,PASS
73.6m s (t0 3)
; PC9 3=1500p