Service manual
Schematic Diagrams
B - 4 Processor 2/7
B.Schematic Diagrams
Processor 2/7
PROCESSOR 2/7 ( CLK,MISC,JTAG )
R115
*1.1K_1%_04
D04 R121 3K ohm, R115, R554 NC
+1.5S_CPU
R121
3K_1%_04
D03C add R554
R554
*1.5K_1%_04
DRAMPWRGD_CPU
VDDPWRGOOD_R
DDR3 Compensation Signals
Processor Compensation Signals
1.5V
R566
1.1K_1%_04
Processor Pullups
Signal from PCH to Processor
Connect to PCH (PLT_RST#)
(needs to be level translated
from 3.3 V to 1.1 V).
XDP_PREQ#
XDP_PRDY#
Connect to the Processor (VTTPWRGOOD) VTT_1.1 VR power
good signal to processor. Signal voltage level is 1.1
V.
If PROCHOT# is not used, then it must be terminated
with a 50-O pull-up resistor to VTT_1.1 rail.
FOR XDP
H_CPURST#
R549 0_04
3.3V 2,11,12,13,15,16,18,21,24,25,26,27,28,29,34,36,37,38,41
R548 0_04
H_PROCHOT#_D
R410 *1K_04
3.3VS
H_DBR#_R
XD P_TD I _M
XD P _ T R ST #
D03 ADD R548,R549 & DEL
CLK_DP_N/P
H_CPURST#
H_PROCHOT#39
H_COMP3
H_COMP2
H_COMP1
H_COMP0
R408 *68_04
D03 ADD
R537
1.1VS_PWRGD13,36
R453 *12.4K_1%_04
D03 ADD
C685,C686,C687
R397 *51_04
R403 *51_04
R146 10K_04
R131 1.5K_1%_04
R432 0_04
R425 49.9_1%_04
R411 20_1%_04
R110 0_04
Q38
*MTN7002ZHS3
G
DS
R449 0_04
R490 24.9_1%_04
R404 49.9_1%_04
R398 51_04
R400 *51_04
R439 10K_04
CLOCKS
MISC THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
U34B
MOLEX 479890142
SM_RCOMP[1]
AM1
SM_RCOMP[2]
AN1
SM_DRAMRST#
F6
SM_RCOMP[0]
AL1
BCLK#
B16
BCLK
A16
BCLK_ITP#
AT30
BCLK_ITP
AR30
PEG_CLK#
D16
PEG_CLK
E16
DPLL_REF_SSCLK#
A17
DPLL_REF_SSCLK
A18
CATERR#
AK14
COMP3
AT23
PECI
AT15
PROCHOT#
AN26
TH ERMTRI P#
AK15
RESET_OBS#
AP26
VCCPWRGOOD_1
AN14
VCCPWRGOOD_0
AN27
SM_DRAMPWROK
AK13
VTTPWR GOOD
AM15
RSTIN#
AL14
PM_EXT_TS#[0]
AN15
PM_EXT_TS#[1]
AP15
PRDY#
AT28
PREQ#
AP27
TCK
AN28
TMS
AP28
TR ST#
AT27
TDI
AT29
TDO
AR27
TDI_M
AR29
TDO_M
AP29
DBR#
AN25
BPM#[0]
AJ22
BPM#[1]
AK22
BPM#[2]
AK24
BPM#[3]
AJ24
BPM#[4]
AJ25
BPM#[5]
AH22
BPM#[6]
AK23
BPM#[7]
AH23
COMP2
AT24
PM_SYNC
AL15
TAPPWRGOOD
AM26
COMP1
G16
COMP0
AT26
SKTOCC#
AH24
R109 68_04
R413 20_1%_04
R558
*10K_04
R135 *0_04
R493 100_1%_04
R125
750_1%_04
R132 49.9_1%_04
R402 51_04
R399 *51_04
R487 130_1%_04
XD P _ T MS
3.3V
1.1VS_VTT
1.1VS_VTT
3.3V
1.1VS_VTT
BCLK_CPU_P 16
H_CPUPWRGD16
BCLK_CPU_N 16
BUF_PLT_RST#12,15,25,26,27,29
H_VTTPWR GD13
PM_DRAM_PWRGD13
CLK_EXP_N 12
H_THRMTRIP#16
CLK_EXP_P 12
1.1VS_VTT 5,6,16,17,18,38
TS#_DI MM0_1 9,10
PM_EXTTS#_EC 25
H_PECI16,25
3.3VS 9,10,11,12,13,15,16,17,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,39
DELAY_PWRGD13,39
H_PM_SYNC13
+1.5S_CPU
Q34 *MTN7002ZHS3
G
D S
R555
*1K_04
R559
*100K_04
R556 0_04
R560 *0_04
DDR3_DRAMRST#9,10
DDR3_DRAMRST#
1.5V
CPU_DRAMRST#
DRAMRST_CNTRL_PCH16
C691
*47n_10V_X7R_04
DRAMRST_CNTRL8
PM_EXTTS#[0]
U38
*74AHC1G08GW
1
2
5
4
3
DRAMPWRGD_CPU
Q39
*2N3904
B
E C
C685 0.1u_10V_X7R_04
H_PROCHOT#_D
C687 0.1u_10V_X7R_04
C686 0.1u_10V_X7R_04
R141 0_04
R443 0_04
R514 *10mil_short
XD P _TD O _M
H_PWRGD_XDP
BCLK_ITP_P
XDP_OBS0_R
PLT_RST#_R
XD P _TC L K
PM_EXTTS#[1]
XDP_TRST#
XD P _TMS
H_COMP3
SYS_AGENT_PWROK
XDP_OBS1_R
H_COMP2
XDP_OBS2_R
H_COMP1
XDP_OBS3_R
PLT_RST#15,24,28,41
XDP_OBS4_R
R407 *1K_04
+1.5S_CPU_PWRGD 37
BCLK_ITP_N
CPU_DRAMRST#
XDP_OBS5_R
XD P _ T D O_ M
SM_RCOMP_0
XDP_OBS6_R
XDP_OBS7_R
SM_RCOMP_1
XD P _ T D I _ R
VDDPWRGOOD_R
SM_RCOMP_2
H_CATERR#
XDP_PREQ#
XD P _ T C LK
XD P _TD I _ R
XD P _TD O _R
H_COMP0
XD P _TD I _ M
+1.5S_CPU 6,34
XD P _TD O _M
1.5V 9,10,18,28,34,37,41
D03C
D03C
D03C
3.3V
C690 *0.1u_10V_X7R_04
R553
*10K_04
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
R537 0_04
H_CATERR#
D04 add R566
Sheet 3 of 57
Processor 2/7