Service manual
Schematic Diagrams
ATHLON 64 3/4 Misc B - 5
B.Schematic Diagrams
ATHLON 64 3/4 Misc
Sheet 4 of 45
ATHLON 64 3/4
Misc
2.5VDDA
+1. 2 5V
+1. 2VLD TB
+2. 5V
+3V
2.5VDDA
+2. 5 V
+2. 5V
2.5VDDA
+VDD3
+2.5V
+2. 5 V
+VDD3
+VDD3
+2.5VS
+12V+
2.5VDDA
+3V
+2. 5V
+2. 5VS
+2.5V
+3VS
+3VS
CPU_VID4 32
CPU_VID0 32
CPU_VID1 32
CPU_VID2 32
CPU_VID3 32
CPUCLK_H9
VCORE+5,32
CPUCLK_L9
VDDI OFB_H30
VDDI OFB_L30
TRMTRIP# 30, 34
+3V 9,10,11,13,14,17,18,19,20,21,22,23,24,26,29,32,33
+3VS 2,8,9,10,11,12,13,14,16,18,19,22,23,24,25,28,29,32,33,35,36
+2.5V 3,5,6,7,16,30,33
+1.25V 3,7,30
+1.2VLDTB 2
H8-THERMTRIP# 22
VCORE 5,32
CPU_PWRGD9
THERMAL_SCLK122,36
THERMAL_SDA122,36
CPU_ALERT#13
THERMER_RST22
+12V 8,20,21,23,26,28,29,30,32
+VDD3 8,13,16,19,23,29,30,31
LDTSTOP#9
CPURST#9
SUSB#13, 22, 24,29, 31, 36
SUSC# 13,22,30
VCORE-5,32
THERMTRIP# 9
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
Z0413
Z0412
Z0410
BP3
BP2
Z0414
Z0415
Z0405
P_DBRDY
P_TDO
BP0
BP1
P_DBREQ_L
Z0406
Z0427
Z0404
SCANCLK1
SCANEN
SCANCLK2
DCLKTWO
Z0403
Z0417
Z0416
Z0420
Z0426
L0_REF0
Z0401
L0_REF1
Z0402
Z0411
Z0418
Z0419
SCANSHENB
SCANSHENA
Z0428
Z0430
CPURST#
THERMDC
THERMDA
Z0408
Z0425
Z0423
TH ER MD A
TH ER MD C
Z0422
Z0409
Z0424
Z0421
Z0429
Z0434
Z0432Z0433
Z0407
P_TCK
P_TMS
P_TDI
P_TRST_L
P_TRST_L
P_TDI
P_TCK
P_TMS
EN_2.5VDDA
Z0431
P_TMS
P_TDO
P_TDI
P_TCK
P_DBRDY
P_TRST_L
P_DBREQ_L
Z0435
Z0436
Z0466
Z0465
Z0464
Z0463
Z0460
Z0462
Z0461
Z0459
Z0451
Z0452
Z0454
Z0456
Z0458
Z0457
Z0455
Z0453
Z0445
Z0446
Z0450
Z0444
Z0443
Z0449
Z0448
Z0447
Z0439
Z0442
Z0441
Z0438
Z0440
Z0437
R819
680
T664
T694
T695
T665
T690
T689
T693
T692
T685
T680
T688
T691
T684
T687
T683
T686
T681
T682
T673
T678
T677
T674
T672
T675
T676
T679
T671
T669
T667
T668
T670
T666
T2 3
R186
100
C912
0. 22U
R172
680
R196
680
T24
R109
* 11. 5K_1%
Q49
NDS352
G
D S
R146
44. 2_1 %
ATHLON 64 (C)
U36C
ZIF_SOCKET754
AH25
AJ25
AF20
AE18
AJ27
AF27
AE26
A23
A24
B23
AE12
AF12
AE11
AJ21
AH21
AJ23
AH2 3
AE24
AF24
C16
AG15
AH17
C15
E20
E17
B21
A21
C18
A19
AJ28
A28
AF21
AF22
AF23
AE23
C1
J3
R3
AA2
D3
AG2
B18
AH1
AE2 1
C20
AG4
C6
AG6
AE9
AG9
A20
A26
A27
AE15
AF15
AG14
AF14
AG13
AG17
AG18
AH1 8
AJ18
AH1 9
AJ19
AE19
D18
C19
D20
C21
B19
A22
AF18
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
AE13
VDDA1
VDD A2
RESET_L
PWROK
LDTSTOP_L
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORE_SENSE
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
NC_AE24
NC_AF24
VTT_A5
VTT_B5
DBRDY
NC_C15
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
KEY0
KEY1
NC_AF21
NC_AF22
NC_AF23
NC_AE23
NC_C1
NC_J3
NC_R3
NC_AA2
NC_D3
NC_AG2
NC_B18
NC_AH1
NC_AE21
NC_C20
NC_AG4
NC_C6
NC_AG6
NC_AE9
NC_AG9
THERMTRIP_L
THERMDA
THERMDC
VID0
VID1
VID2
VID3
VID4
NC_AG17
NC_AG18
NC_AH18
NC_AJ18
G_FBCLKOUT_H
G_FBCLKOUT_L
DBREQ_L
NC_D18
NC_C19
NC_D20
NC_C21
NC_B19
TDO
NC_AF18
NC_D22
NC_C22
NC_B13
NC_B7
NC_C3
NC_K1
NC_R2
NC_AA3
NC_F3
NC_C23
NC_AG7
NC__AE22
NC_C24
NC_A25
NC_C9
VTT_SENSE
R713
2.2K
R182
10K
R202
680
T3 6
R180
680
T27
CA26
*0.1U
R197
0
R101
1K
U6
SC 1563 ISK
5
2
1
4
3
VI N
GND
SHD N
VO
ADJ
J3
OPEN_1A
12
R176
169_1%
R178
820
T3 3
U7
NE1617
1
5
15
9
13
2
16
12 3
14
4
11
10
6
7
8
N/C1
N/C2
STBY #
N/C3
N/C4
VCC
N/C5
SMBD ATA DXP
SMBC LK
DXN
ALERT#
ADD0
ADD1
GND1
GND2
T2 2
T2 8
T30
T3 5
R181
100K
Q40
2N7002
G
DS
Q26
*2N7002
G
DS
JDEBUG1
HEADER 10B_R
12
34
56
78
910
C83
2200P
C117
1000P
CA28
3300P
R105
2.2K
R323
*0_0805
T32
R97
1K
R204
80.6
R203
*560
T3 4
R523
*0
R148
*100K
C79
0. 1U
C144 3900P_0805
R183
*560
R173
*560
C90 0.1U
Q27
*AO3401
G
DS
T25
R103
2.2 K
CA27
0. 22U
Q85
2N 7002
G
DS
R112
100K
R322
100K
R179
680
CT1
4.7U_0805
Q39
2N7002
G
DS
Q98
2N7 002
G
DS
R145
44. 2_1 %
R512
820
R110
0
+
C570
100U _10V _73 43
12
C150 3900P_0805
T31
C673
0. 1U
R144
680
Q50
2N 7002
G
DS
R716
0
C116
1000P
R210
680
T29
T3 7
CA1
0.22U
L19
FCI2520-R33K
T2 6
CA29
0. 1U
R187
680
R717
10K
RN35
8P4RX560_0402
1
2
3
45
6
7
8
R98
*4 70_080 5
R184
680
RN34
8P4R X560 _0402
1
2
3
4 5
6
7
8
C82
*0.1U
D28
1N 4148
AC
Rout with 10/5/10
or differential
pairs 5/5/5/5/5
Low active to short
down system.
+2.5V 2.4~2.6 35mA
S1 ON S3 OFF
EN_2.5VDDA--> Low: Enable Hi :Disable
300nH/350mA
TOP SIDE
12 mil
VCORE Feedback
DUAL2.5V,DUAL1.25V Feedback
The cpu core is held in Low pow er state & MRMCLKA/B & MEMRESET_L
Output are forced Low, When CPURST# IS Asser ted.
35mA
35mA
Hy per Transport I/O Compensation
R35 Should be placed as close to the CPU as possible.
G_FBCLKOUT_H
/_L route 8/5/20.
2005/04/20
Adds a +2.5VS voltage source.
94/7/25
Del R182, D28, Q40
Rubb an d
94/7/25
+12V change to +12V+
Rubband
VGA_Slave
ADD0 ADD1
NC
NC GND
VCC
Address
0101 001
0101 011
VGA_Master
CPU
ID
00
94/9/15
CK8 The rm al Trip
protect
Rubb an d
94/9/26
Rubb an d
94/11/11
94/10/31 Kevin
94/10/31 Kevin
94/11/11 Kevin
94/10/31 Kevin
94/10/31 Kevin
680 Change 100K