Service manual
Schematic Diagrams
B - 4 ATHLON 64 2/2 DDR
B.Schematic Diagrams
ATHLON 64 2/2 DDR
+1.25V
+1. 25V
+2.5V
+2. 5V
+2.5V
+2. 5V +2.5V
+2.5V
+2.5V
DQM[0..7]6,7
MEMDQS[0. .7]6,7
MEMD ATA[ 0.. 63]6,7
MEMR ASA_L 6,7
MEMC ASA_L 6,7
MEMW EA_L 6 ,7
MEMC ASB_L 6,7
MEMR ASB_L 6,7
MEMBANKB1 6,7
MEMBANKA0 6,7
ME MCS _L 0 6, 7
MEMBANKA1 6,7
MEMBANKB0 6,7
MEMC LK_ L76
MEMC LK_ L66
MEMC LK_ L56
MEMC LK_ L46
MEMC LK_H56
MEMC LK_H46
MEMC KEB 6, 7
MEMC KEA 6, 7
MEMC LK_H66
MEMW EB_L 6 ,7
MEMC LK_H76
+1.2 5V 4,7, 30
+2.5V 4,5,6,7, 16,30,33
ME MCS _L 1 6, 7
ME MCS _L 2 6, 7
ME MCS _L 3 6, 7
MAA[ 0. . 13 ] 6,7
MAB[ 0. . 13 ] 6,7
MAB13
MAA4
MMDATA52
MMDATA35
MMDATA34
MMDATA32
MAB9
RSVD_MAA15
MEMCKEB
MMDATA54
MMDATA8
RSVD_MAB14
MAB8
MMDATA18
MEMCS_L5
MMDQS4
MMDATA47
MMDATA31
MMDATA0
MAB5
MAB0
MMDATA20
MMDATA25
MMDATA29
MEMDQS9
MMDQS7
MMDATA38
MMDATA6
MMDATA2
MEMZP
MAB6
M EM BAN KB1
MAA8
MEMDQS10
MMDATA60
MMDATA58
MMDATA13
MMDATA11
MMDATA9
MEMBANKB0
MEMCASA_L
MEMDQS12
MMDATA51
MMDATA43
MMDATA42
MEMZN
MAB10
MMDATA30
M EM BAN KA1
MMDATA49
MAB11
MAA11
MEMCS_L2
MEMCS_L1
MEMDQS15
MMDQS0
MMDATA4
M EM R ES ET _L
MEMRASB_L
MMDATA19
MMDATA23
MMDATA24
MMDATA26
MAA9
MEMCS_L4
MMDQS1
MMDATA62
MMDATA50
MMDATA48
MMDATA33
MAA6
MAA0
MEMDQS13
MMDATA39
MMDATA37
MMDATA36
MEMCS_L6
MEMC LK_L6
MEMDQS11
MMDQS5
MMDATA56
MAB4
MAB1
MMDATA16
MMDATA27
MMDATA28
MEMWEA_L
MMDQS3
MMDQS2
MMDATA63
MMDATA40
MMDATA10
MEMWEB_L
RSVD_MAB15
MMDATA17
MMDATA22
M EM BAN KA0
MEMCS_L3
MMDATA59
MMDATA57
MMDATA55
MMDATA44
MMDATA3
MEMCASB_L
MAB2
MMDATA15
RSVD_MAA14
MAA10
MAA5
MAA3
MEMC LK_L7
MMDATA12
MAB3
MAA12
MMDATA46
MMDATA1
MAB12
MMDATA21
MAA13
MAA1
MEMRASA_L
MEMCS_L7
MEMCKEA
MEMDQS16
MEMDQS14
MMDATA61
MMDATA53
MMDATA45
MMDATA41
MMDATA7
MMDATA5
MAB7
MAA7
MAA2
MEMC LK_L5
MMDQS6
MMDATA14
MEMC H EC K7
MEMC H EC K6
MEMC H EC K5
MEMC H EC K4
MEMC H EC K3
MEMC H EC K2
MEMC H EC K1
MEMC H EC K0
MEMDQS17
MMDQS8
MEMC LK_H 5
MEMC LK_H 4
MEMC LK_H 6
MEMC LK_H 7
MEMC LK_L4
MEMC LK_H 1
MEMC LK_H 0
MEMC LK_L0
MEMC LK_L1
MMDA TA16
MMDA TA39
MEMD ATA2 8
MMDA TA14
MMDA TA48
MMDQ S6
MEMD ATA4 4
MMDA TA29
MEMD ATA4
MEMD QS11
MMDA TA18
MEMD QS 7
MEMD ATA5 3
MEMD ATA1 2
MEMD ATA2 7
MMDA TA40
MMDA TA7
MEMD ATA3 6
MMDQ S2
DQM1
MMDA TA49
MEMD ATA5 9
MEMD ATA4 2
MEMD ATA6 1
DQM5
MMDA TA38
MEMD ATA1 9
MMDQ S3
MMDA TA59
MMDA TA31
MMDA TA51
MEMD ATA3 1
MEMD ATA1 8
MMDA TA45
MMDA TA5
MEMD QS12
MMDA TA6
MEMD ATA4 0
MMDA TA42
MMDA TA26
MEMD ATA2
MMDA TA3
MEMD ATA4 3
MEMD ATA6 3
DQM6
MEMD ATA3 4
MEMD QS16
MEMD ATA2 4
MMDQ S5
MMDA TA24
MMDA TA36
MMDA TA37
MMDA TA60
MEMD ATA3 3
MEMD ATA5 4
MMDA TA46
MEMD ATA2 9
MEMD ATA8
MEMD QS 6
DQM3
MMDA TA15
MEMD ATA3 9
MEMD ATA1 4
MEMD ATA6
MEMD ATA7
MMDA TA52
MMDA TA32
MEMD ATA4 9
MMDA TA63
MMDA TA28
MMDA TA12
MEMD QS 3
MEMD ATA4 5
MEMD QS9
MEMD ATA5 7
MEMD ATA4 1
MEMD ATA3 2
MMDA TA47
MMDA TA54
MMDA TA34
MMDA TA4
MEMD QS14
MMDA TA2
MEMD ATA5 1
MMDA TA8
MEMD ATA3 8
MEMD ATA5 5
MMDA TA23
MEMD ATA3
MMDA TA50
MMDA TA56
MEMD ATA3 7
MEMD ATA2 2
MEMD ATA4 7
DQM7
MEMD ATA1 6
MMDA TA61
MEMD ATA6 0
MEMD ATA5
MMDA TA30
MEMD QS 1
MEMD ATA4 6
MEMD QS 5
MMDA TA43
MEMD ATA5 0
MEMD ATA5 8
MEMD QS13
MMDA TA22
MMDA TA33
MMDA TA41
MMDA TA57
MMDA TA58
MEMD ATA1 5
DQM2
MEMD ATA3 0
MEMD QS10
DQM0
MEMD ATA4 8
DQM4
MMDA TA27
MMDA TA19
MMDA TA44
MEMD QS15
MMDA TA13
MEMD ATA2 3
MMDA TA53
MEMD ATA2 5
MEMD ATA2 6
MMDQ S7
MEMD ATA1 7
MEMD ATA5 2
MMDA TA62
MMDA TA55
MMDA TA25
MEMD ATA6 2
MEMD ATA5 6
MMDA TA17
MMDQ S1
DDRVREF_CPU
MEMD QS 2
MEMD ATA1 3
MMDA TA21MEMD ATA2 1
MEMD ATA2 0 MMDA TA20
MMDA TA35
MEMD QS 4
MEMD ATA3 5
MMDQ S4
MEMCS_L0
MEMC LK_L4
MEMC LK_L5
MEMC LK_L7
MEMC LK_L6
MEMCLK_H7
MEMCLK_H6
MEMCLK_H4
MEMCLK_H5
MEMD ATA1
MEMD ATA0 MMDATA0
MMDA TA1
MEMD QS 0 MMDQ S0
MMDA TA11
MEMD ATA1 0 MMDA TA10
MEMD ATA9
MEMD ATA1 1
MMDA TA9
Z0301
Z0302
Z0303
Z0304
Z0305
Z0306
Z0307
Z0308
Z0309
Z0310
Z0315
Z0311
Z0312
Z0313
Z0314
Z0316
RN43
8P4R X10_0402
1
2
3
4 5
6
7
8
R276
10K
R275
10K
T11
C210
0.2 2U
+
C641
470U _6 .3V _7343
12
R531
34. 8_1%
+
C638
330U _2 .5V _7343
12
+
C640
330U _6 .3V _7343
12
RN9
8P4R X10_0402
1
2
3
4 5
6
7
8
C238
0.22U
CB6
0.1 U
T21
R255
120_1%
RN49
8P4R X10_0402
1
2
3
4 5
6
7
8
RN12
8P4R X10_0402
1
2
3
4 5
6
7
8
R630
10
T19
T14
CT11
4.7 U_ 0805
CB2
0.2 2U
CT8
4. 7U_0805
R388
10
CB1
0. 22U
CT18
10U_0805
+
C642
470U _6.3V_7343
12
RN10
8P4R X10_0402
1
2
3
4 5
6
7
8
R565
10K
CT14
4. 7U_0 805
R390
10
C237
0.2 2U
RN18
8P4R X10_0402
1
2
3
4 5
6
7
8
ATHLON 64 (B)
U36B
ZIF_SOCKET754
AG12
D14
C14
A18
B17
C17
D17
AF16
AG16
AH16
AJ17
AG10
AJ16
AJ14
AJ12
AG11
AJ15
AH15
AJ11
AH11
AJ10
AJ9
AH5
AG5
AH9
AJ7
AJ6
W1
M1
L2
J2
G3
L1
L3
G1
G2
F1
E3
B3
A3
E1
E2
A4
C5
B5
A5
A9
C11
A6
C7
B9
A10
A11
C13
A15
A17
B11
A12
B15
A16
AJ13
AJ8
AJ2
AB1
J1
D1
A8
A14
T1
AH13
AH7
AG1
AA1
H1
C2
A7
A13
R1
AE8
AE7
P4
P5
K4
V4
AE10
AG8
E11
C10
P3
R5
K5
V3
AF10
AF 8
E12
D10
E5
C4
E6
D6
E7
E8
C8
D8
H5
D4
G5
H3
K3
N5
T3
T5
V5
Y3
AB4
Y5
AD3
AB5
AE5
M5
AF3
AE6
E10
C12
E13
W3
AC1
AC3
W2
Y1
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF 1
AH3
AJ3
AJ5
J5
L5
M3
T4
U5
W5
Y4
AB3
AA5
AD4
AC5
AD5
M4
AF4
AF6
E9
D12
E14
U2
U1
P1
N2
V1
U3
N1
N3
H4
F5
F4
MEMVREF1
MEMZN
MEMZP
VT T_A1
VT T_A2
VT T _A3
VTT_A4
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEM D AT A0
MEM D AT A1
MEMDATA2
MEMDATA3
MEMDATA4
MEMDATA5
MEMDATA6
MEMDATA7
MEMDATA8
MEM D AT A9
M EM D AT A10
M EM D AT A11
M EM D AT A12
MEMDATA13
MEMDATA14
MEMDATA31
MEMDATA32
M EM D AT A33
M EM D AT A34
M EM D AT A35
M EM D AT A36
MEMDATA37
MEMDATA38
MEMDATA39
MEMDATA40
MEMDATA41
MEMDATA42
MEMDATA43
MEMDATA44
M EM D AT A45
M EM D AT A46
M EM D AT A47
M EM D AT A48
MEMDATA49
MEMDATA50
MEMDATA51
MEMDATA52
MEMDATA53
MEMDATA54
MEMDATA55
MEMDATA56
M EM D AT A57
M EM D AT A58
M EM D AT A59
M EM D AT A60
MEMDATA61
MEMDATA62
MEMDATA63
MEMDQS0
MEMDQS1
MEMDQS2
MEMDQS3
MEMDQS4
MEMDQS5
MEMDQS6
MEMDQS7
MEMDQS8
MEMDQS9
MEMDQS10
MEMDQS11
MEMDQS12
MEMDQS13
MEMDQS14
MEMDQS15
MEMDQS16
MEMDQS17
MEMCKEA
MEMCKEB
MEMC LK_L0
MEMC LK_L1
MEMC LK_L2
MEMC LK_L3
MEMC LK_L4
MEMC LK_L5
MEMC LK_L6
MEMC LK_L7
MEMC LK_H 0
MEMC LK_H 1
MEMC LK_H 2
MEMC LK_H 3
MEMC LK_H 4
MEMC LK_H 5
MEMC LK_H 6
MEMC LK_H 7
MEMCS_L0
MEMCS_L1
MEMCS_L2
MEMCS_L3
MEMCS_L4
MEMCS_L5
MEMCS_L6
MEMCS_L7
MEM R AS A_L
MEM C AS A_L
MEMWEA_L
MEMBANKA0
MEMBANKA1
MEMADD A0
MEMADD A1
MEMADD A2
MEMADD A3
MEMADD A4
MEMADD A5
MEMADD A6
MEMADD A7
MEMADD A8
MEMADD A9
MEMADD A10
MEMADD A11
MEMADD A12
MEMADD A13
NC_C12
NC_E13
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
M EM D AT A24
M EM D AT A23
M EM D AT A22
M EM D AT A21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMBANKB0
MEMBANKB1
MEMADD B0
MEMADD B1
MEMADD B2
MEMADD B3
MEMADD B4
MEMADD B5
MEMADD B6
MEMADD B7
MEMADD B8
MEMADD B9
MEMADD B10
MEMADD B11
MEMADD B12
MEMADD B13
NC_D12
NC_E14
MEMC HECK0
MEMC HECK1
MEMC HECK2
MEMC HECK3
MEMC HECK4
MEMC HECK5
MEMC HECK6
MEMC HECK7
MEMRASB_L
MEMCASB_L
MEMWEB_L
R564
10K
RN41
8P4R X10_0402
1
2
3
4 5
6
7
8
T18
CT10
4.7U_0805
C211
100P
CT9
4. 7U_0805
R391
10
R535
100_1%
R389
10
R240
120_1%
R538
100_1%
RN42
8P4R X10_0402
1
2
3
4 5
6
7
8
RN20
8P4R X10_0402
1
2
3
4 5
6
7
8
CB5
1000P
R627
10
R529
34. 8_1%
T15T702
T700
T708
T706
T704
T710
T701
T705
T703
T711
T707
T709
RN13
8P4R X10_0402
1
2
3
4 5
6
7
8
RN52
8P4R X10_0402
1
2
3
4 5
6
7
8
T12
RN47
8P4R X10_0402
1
2
3
4 5
6
7
8
RN11
8P4R X10_0402
1
2
3
4 5
6
7
8
T6 97
+
C700
330U _2.5V_734 3
12
C217
0.22U
T6 96
R387
10
R629
10
T6 99
T6 98
RN17
8P4R X10_0402
1
2
3
4 5
6
7
8
C637
100P
T13
R392
10
T20
CT19
10U_0805
CB4
0.1U
C197
0.2 2U
CT15
4.7U_0805
CT12
4. 7U _0805
R628
10
RN48
8P4R X10_0402
1
2
3
4 5
6
7
8
CT13
4.7 U_0805
C290
100P
RN51
8P4R X10_0402
1
2
3
4 5
6
7
8
R231
120_1%
RN40
8P4R X10_0402
1
2
3
4 5
6
7
8
C291
0. 22U
RN19
8P4R X10_0402
1
2
3
4 5
6
7
8
RN50
8P4R X10_0402
1
2
3
4 5
6
7
8
+
C639
330U_2.5V_7343
12
C289
100P
CB3
0.1U
R254
120_1%
Put near Athlon 64
for decoupling
noise V0.9
DDRVREF with
40~50 mil, 25
mil clearance
or shielded by
GND
+1.25V VDDIO/2
Memo r y I/ O Co mpe n s at ion
MemReset_L is used to reset the register as required to support the Suspend to Ram state (ACPI S3).
125mA
MEMCLK_H[4..7]
route 5/5/ 20.
MEMCLK_L[4..7]
route 5/5/ 20.
MEMDQS[0..17]
route 5/5/20.
94/10/31 Kevin
Sheet 3 of 45
ATHLON 64 2/2
DDR