Hardware manual

3 Programmers Reference EUROCOM-17-5xx

54 Hardware Manual

3.3.2.4 VMEbus Block

Transfer

Option

The EUROCOM-17-5xx board supports master/slave block transfer

cycles. This is done by the MOVEM.L operation of the CPU, or by the

local DMA device in the VIC. The data size is restricted to D32 and may

cross 256byte boundaries if the slave is also capable of boundary

crossing.

Several options within the VIC chip allow to generate different block

transfer cycle types. The following code initializes a DMA write block

transfer of two times 256bytes (write block):

MOVE.L #$4000,d0 local source address

MOVE.L #$80002000,A0 VMEbus target address

MOVE.B #$20,$FEC010D3 32 byte blocks

MOVE.B #$01,$FEC010DB 256 byte total

* disable interrupts which may use VIC or VMEbus

MOVE.B #$00,$FEC010BF clear DMA status

MOVE.B #$40,$FEC010D7 enables DMA block transfer

mode

MOVE.L D0,(A0) start DMA block transfer

NOP

LOOP1 BTST #0,$FEC010BF wait for BLT finished

BNE LOOP1

MOVE.B #$00,$FEC010BF clear DMA status

ADD.L #$100,D0 next block

ADD.L #$100,A0

MOVE.L D0,(A0) start DMA block transfer

NOP

LOOP2 BTST #0,$FEC010BF wait for BLT finished

BNE LOOP2

MOVE.B #$00,$FEC010D7 terminate block transfer

* Interrupts may be enabled

...

During transfer, the user has to check the DMA status register

($FEC0.01BF) and the bus error register of the VIC ($FEC0.10BB) to see

if a VMEbus error condition has occurred. To speed up block transfer

cycles, set bit1 of the interface configuration register of the VIC

($FEC0.10AF). This may violate the VMEbus specification, but is

guaranteed to operate with any EUROCOM-17-5xx board.

Block transfer with byte or word size is impossible. Also the start address

and the transfer length must be multiples of 16bytes.