Hardware manual

3 Programmers Reference EUROCOM-17-5xx
52 Hardware Manual
3.2.6 RAM Access
from ILACC
The AM79C900 Ethernet Controller uses DMA transfer cycles to transfer
commands, data and status information to and from the DRAM.
3.3 VMEbus Interface
Each EUROCOM-17-5xx has a VMEbus master and a VMEbus slave
interface. Additionally, VMEbus system controller functions are available
via the VMEbus gate array (VIC) used on the EUROCOM-17-5xx board.
3.3.1 System
Controller
The EUROCOM-17-5xx features a full slot-one system controller,
including SYSCLK, SYSRESET, bus time-out, IACK daisy chain driver,
and a four level arbitration circuit. System controller capabilities are
enabled by switch S3 in position 'SC' at the front panel.
SYSCLK The SYSCLK is always driven if the system
controller is enabled.
SYSRESET A low level on this signal resets the internal logic
and asserts the local reset for a minimum of
200ms. If the VIC is configured as system
controller, the reset switch on the front panel (S3)
asserts the SYSRESET for a minimum of 200ms.
Writing a $F0 to the system reset register of the
VIC at address $FEC0.10E3 resets all registers of
the VIC and asserts the SYSRESET output for a
minimum of 200ms.
BTO The VIC includes two independent bus time-out
modules (BTO) for local cycles and for VMEbus
cycles. The VMEbus time-out is only enabled when
the VIC is configured as system controller. On VIC
reset, the VMEbus time-out period is set to 64 µs
and the local bus time-out period to 32 µs. This can
be altered by programming the transfer time-out
register of the VIC at address $FEC0.10A3. Use the
RMon setup menu to change this value.
FourLevelArbiter If the VIC is configured as system controller, the
four level arbiter is enabled and programmed by
writing into the arbiter/requester configuration
register at address $FEC0.10B3. Use the RMon
setup menu to change this value.