Hardware manual

3 Programmers Reference EUROCOM-17-5xx
84 Hardware Manual
3.18.2 VMEbus
Interrupt
Sources
Individual interrupt levels are masked dynamically under software control
by programming the appropriate VMEbus interrupt control register (ICR1
to ICR7) of the VIC. This feature allows easy implementation of multi-
processor systems. The VMEbus interrupt requests are always active low
and level-sensitive.
All VMEbus IRQs are disabled after the initialization of RMon. To
change this, use the RMon setup menu. For further details, see the data
sheet VIC068.