Hardware manual

3 Programmers Reference EUROCOM-17-5xx
82 Hardware Manual
Table48: VIC Interrupt Priority Scheme
1. The IRQ levels inside the VIC have to be programmed with the level mentioned in
the column. All other IRQ levels are example values of the operating system’s
initialization, they may be changed by the user.
IRQ Source Generated
CPU Level
Vector
supplied by
LIRQ7 ILACC 3 VIC
Error Group IRQ ACFAIL from VMEbus 7 VIC
Write Post Fail 7 VIC
Arbitration Time-out 7 VIC
SYSFAIL from VMEbus 7 VIC
LIRQ6 CL-CD2401 higher priority 5
1)
CL-CD2401
System CIO medium priority 5
1)
System CIO
User CIO lower priority 5
1)
User CIO
LIRQ5 LEB 2
1)
LEB
LIRQ4 Video Frame Inactive 5 VIC
LIRQ3 SCSI Controller 2 VIC
LIRQ2 Clock Tick Timer of VIC 6 VIC
LIRQ1 Keyboard Controller 1 VIC
ICGS Group IRQ Interprocessor Communication
Global Switches of VIC
6 VIC
ICMS Group IRQ Interprocessor Communication
Module Switches of VIC
7 VIC
IRQ7 VMEbus 7 VMEbus
IRQ6 VMEbus 6 VMEbus
IRQ5 VMEbus 5 VMEbus
IRQ4 VMEbus 4 VMEbus
IRQ3 VMEbus 3 VMEbus
IRQ2 VMEbus 2 VMEbus
IRQ1 VMEbus 1 VMEbus
DMA Status IRQ VIC DMA Controller 1 VIC
VMEbus Interrupt
Acknowledged
VIC Interrupter 1 VIC