Hardware manual

3 Programmers Reference EUROCOM-17-5xx

74 Hardware Manual

3.11 SCSI Interface

A Small Computer System Interface (SCSI) controller is built around a

NCR53C720 chip. The full specification (ANSI K3T 9.2) is implemented,

supporting all standard SCSI features including arbitration, disconnect,

reconnect, and parity.

3.11.1 SCSI Controller The interrupt request line (IRQ) of the SCSI controller is connected to the

LIRQ3 input of the VIC. The NCR53C720 cannot supply its own vector,

so the VIC has to be programmed to supply a vector for the SCSI

controller. The VIC LICR3 has to be programmed to level-sensitive and

has to supply the IRQ vector.

The EUROCOM-17-5xx uses Big Endian Bus Mode2 of the

NCR53C720.

According to the SCSI specification, the interconnecting flat cable must

be terminated at both ends. On the EUROCOM-17-5xx this is done

through removable resistor networks (R601 - R604) between connector

X101 and X102. If the EUROCOM-17-5xx board is not located at either

end of the cable, these resistors must be removed.

A detailed description of the NCR53C720 controller chip can be found in

the data sheet.

The first access to the NCR53C720 must set the EA bit in the DCNTL

EA bit set will lock the CPU bus.