Hardware manual

3 Programmers Reference EUROCOM-17-5xx
70 Hardware Manual
3.9 Keyboard Interface
The keyboard interface is designed to support PS/2 compatible keyboards.
This interface receives data from and transmits data to the keyboard under
interrupt control. The keyboard interface consists of two registers: the data
register and the control/status register.
A write access to the data register loads the transmit shift register with the
corresponding data byte. The data is immediately transmitted to the
keyboard. If enabled, an interrupt is generated when the data byte was sent
and the keyboard controller has received the line control bit from the
keyboard. The write access to the data register clears the transmit buffer
empty (TBE) bit in the status register.
The received data is available in the data register. The contents of the data
register is only valid if the receive buffer full (RBF) bit in the status
register is set. The read access to the data register clears the RBF bit in the
status register.
The keyboard interface is controlled by the control/status register (CSR).
The following table shows the bits of the CSR. Read accesses to the CSR
supply the control register, write accesses transfer data to the status
register.
Do not use the M680xx btst and bclr commands to access the CSR
because read and write access do not affect the same bits.
Table41: Address Assignment of Keyboard Controller Registers
Address Description Width [b]
$FEC6.0000 Data Register 8
$FEC6.0001 Control/Status Register 8
i