Hardware manual

3 Programmers Reference EUROCOM-17-5xx

68 Hardware Manual

The local interrupt control register6 (LIRQ6) of the VIC has to be

programmed for an active low, level-sensitive input. The vectors are

supplied by the MPC. The VIC has to be programmed to generate

interrupts on level 5 to the CPU. Only CPU IACK level 5 cycles are

routed to the MPC.

For polled operation, the MPC can be switched to IACK context by

reading address $FEC6.6000 - $FEC6.7FFF. A0-A6 must match one of

the priority interrupt level registers of the MPC.