Hardware manual

3 Programmers Reference EUROCOM-17-5xx
64 Hardware Manual
3.5 Ethernet Interface (802.3/10base5)
The ILACC’s internal registers are selected by writing the corresponding
register number to address $FEC6.8006 and accessed at address
$FEC6.8002. Both addresses must be accessed with word-size
instructions.
After initialization and starting, the ILACC operates without any CPU
interaction. It transfers prepared data, receives incoming packets and
stores them into reserved memory locations. To signal service requests,
the ILACC interrupt signal is connected to the VIC’s LIRQ7 input. The
VIC has to be programmed to level-sensitive and has to supply the vector,
because the ILACC has no provision built to do so.
A detailed description of the AM79C900 can be found in the data sheet.
Table35: Ethernet Controller Address Layout
Address Description
$FEC6.8002 Register Data Port (RDP)
$FEC6.8006 Register Address Port (RAP)