Service manual

Schematic Diagrams
Processor 1/7 B - 3
B.Schematic Diagrams
Processor 1/7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
THERM_VOLT
PEG_IRCOMP_R
3.3V
VCCIOA_OUT
VA
VCCIOA_OUT5,6
DMI_TXP013
DMI_TXP113
DMI_TXP213
DMI_TXP313
DMI_TXN013
DMI_TXN113
DMI_TXN213
DMI_TXN313
DMI_RXN013
DMI_RXN113
DMI_RXN213
DMI_RXN313
DMI_RXP013
DMI_RXP113
DMI_RXP213
DMI_RXP313
3.3V11,19,25,30,32,33,34,35,36,38,39
THERM_VOLT 25
FDI_CSYNC13
FDI_INT13
VA34,42
Title
Size Document Number Rev
Date: Sheet
of
6-71-A11S0-D02
1.0
[02] PROCESSOR 1/7
A3
246Monday, August 19, 2013
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number Rev
Date: Sheet
of
6-71-A11S0-D02
1.0
[02] PROCESSOR 1/7
A3
246Monday, August 19, 2013
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Document Number Rev
Date: Sheet
of
6-71-A11S0-D02
1.0
[02] PROCESSOR 1/7
A3
246Monday, August 19, 2013
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
20 mil
CAD NOTE: PEG_ICOMPI and RCOMPO signals
should be shorted and routed with
- max length = 500 mils
- typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with
- max length = 500 mils
- typical impedance = 14.5 mohms
Haswell Processor 1/7 ( DMI,FDI,PEG )
VGA SIDE
PEG Compensation Signal
ᷕ
ᷕᷕ
ᷕ⿏
⿏⿏
⿏ BOM Not Stuff
R283 24.9_1%_04R283 24.9_1%_04
Haswell rPGA EDS
PEG
FDI
DMI
1 OF 9
U40A
PZ94721-3622
Haswell rPGA EDS
PEG
FDI
DMI
1 OF 9
U40A
PZ94721-3622
DMI_RXN_0
D21
DMI_RXN_1
C21
DMI_RXN_2
B21
DMI_RXN_3
A21
DMI_RXP_0
D20
DMI_RXP_1
C20
DMI_RXP_2
B20
DMI_RXP_3
A20
DMI_TXN_0
D18
DMI_TXN_1
C17
DMI_TXN_2
B17
DMI_TXN_3
A17
DMI_TXP_0
D17
DMI_TXP_1
C18
DMI_TXP_2
B18
DMI_TXP_3
A18
PEG_RCOMP
E23
PEG_RXN_0
M29
PEG_RXN_1
K28
PEG_RXN_2
M31
PEG_RXN_3
L30
PEG_RXN_4
M33
PEG_RXN_5
L32
PEG_RXN_6
M35
PEG_RXN_7
L34
PEG_RXN_8
E29
PEG_RXN_9
D28
PEG_RXN_10
E31
PEG_RXN_11
D30
PEG_RXN_12
E35
PEG_RXN_13
D34
PEG_RXN_14
E33
PEG_RXN_15
E32
PEG_RXP_0
L29
PEG_RXP_1
L28
PEG_RXP_2
L31
PEG_RXP_3
K30
PEG_RXP_4
L33
PEG_RXP_5
K32
PEG_RXP_6
L35
PEG_RXP_7
K34
PEG_RXP_8
F29
PEG_RXP_9
E28
PEG_RXP_10
F31
PEG_RXP_11
E30
PEG_RXP_12
F35
PEG_RXP_13
E34
PEG_RXP_14
F33
PEG_RXP_15
D32
PEG_TXN_0
H35
PEG_TXN_1
H34
PEG_TXN_2
J33
PEG_TXN_3
H32
PEG_TXN_4
J31
PEG_TXN_6
C33
PEG_TXN_7
B32
PEG_TXN_8
B31
PEG_TXN_9
A30
PEG_TXN_10
B29
PEG_TXN_11
A28
PEG_TXN_12
B27
PEG_TXN_13
A26
PEG_TXN_14
B25
PEG_TXN_15
A24
PEG_TXP_0
J35
PEG_TXP_1
G34
PEG_TXP_2
H33
PEG_TXP_3
G32
PEG_TXP_4
H31
PEG_TXP_5
H30
PEG_TXP_6
B33
PEG_TXP_7
A32
PEG_TXP_8
C31
PEG_TXP_9
B30
PEG_TXP_10
C29
PEG_TXP_11
B28
PEG_TXP_12
C27
PEG_TXP_13
B26
PEG_TXP_14
C25
PEG_TXP_15
B24
PEG_TXN_5
G30
FDI_CSYNC
H29
DISP_INT
J29
C97
*0.1u_10V_X7R_04
C97
*0.1u_10V_X7R_04
R90
10K_1%_04
R90
10K_1%_04
JP_CAP1
*85205-04001
JP_CAP1
*85205-04001
1
2
3
4
NC1
NC2
RT3
TH05-3H103FR
P/N = 6-17-10320-731
10K_1%_NTC_04
RT3
TH05-3H103FR
P/N = 6-17-10320-731
10K_1%_NTC_04
1 2
Sheet 2 of 45
Processor 1/7