Service manual

Schematic Diagrams
B - 54 Sequence
B.Schematic Diagrams
Sequence
RTCRST#
VCCRTC
5V
3V
PWRBTN#
SLP_S3#
SLP_S4#
1.675mS
DD_ON#
1.276mS
30mS
98.5mS
5VS
50uS
1.5V (VDDQ)
3.3VS
1.8mS1.1VS
1.882mS1.8VS
240mS
1.1VS_VTT
VDDPWRGOOD_R
H_VTTPWRGD(ALL_SYS_PWRGD)
VCORE_ON
350uS
512mS
VCORE
CLKIN_BCLK
1.056mS
5.64mS
SYS_PWRGD/SB_PWROK/PM_MPWROK
134.5mS
DDR1.5V_PWRGD
BCLK_CPU_N/P
H_CPUPWRGD
SPEC 0.0001mS ~ 500mS
SPEC MIN 9mS
SYS_PWRGD ->H_CPUPWRGD
SPEC100mS <146.87mS
1.1mS
SPEC MIN 99mS
SPEC MAX 200mS
SPEC MIN 10mS
SPEC MIN 1mS
SPEC MIN 1mS
SPEC MIN 30uS
SPEC MIN 100mS
SUS_STATE#
SPEC 0.03mS ~ 2mS
150uS
PLT_RST#
B4100 D01 POWER SEQUENCE
ACPRESENT
RSMRST#
5.7mS
1.85mS
790uS
2.17mS
1.73mS
450mS
734mS
5mS
SUS_PWR_DN_ACK
36mS
H_CPUPWRGD --> PLT_RST#
SPEC MIN 1mS
SPEC MIN 60uS
50uS
VCORE ->H_CPUPWRGD
SPEC 0.05mS ~ 650mS
SPEC MIN 1mS
SPEC MAX 3mS
SPEC MAX 200mS
145.876mS
?mS
953uS
CLKEN#
Sheet 53 of 53
Sequence