Service manual
85
SiS5103 System I/O & PMU
• Integrated bridge between PCI bus and ISA bus.
∗ Translates PCI bus cycles into ISA bus cycles.
∗ Translates ISA master or DMA cycles into PCI bus cycles.
∗ Provides PCI-to-ISA memory one Double Word Posted Write Buffer.
• Integrated ISA bus compatible logic.
∗ ISA bus controller.
∗ ISA arbiter for ISA master, DMA devices, and refresh.
∗ Built-in two 8237 compatible DMA controllers.
∗ Built-in two 8259A compatible interrupt controllers.
∗ Built-in one 8254 timer.
• Supports reroutibility of four PCI interrupts to any unused IRQ interrupt.
• Supports flash ROM.
• Built-in RTC with 242 bytes extended CMOS SRAM.
• Built-in PCI IDE.
∗ Fully compatible with PCI local bus specification v2.0.
∗ Accommodates 8 bits, 16 bits, and 32 bits data transfer.
∗ Supports PCI burst read/write operation.
∗ Supports read ahead & posted write buffers for concurrent system
operation.
∗ Controls two IDE channels and max. connects 4 IDE drives.
∗ Supports PIO mode 4 timing proposal on enhanced IDE specifications.
∗ Programmable command and recovery timing for reads and writes per
channel.
∗ Auto IDE channel speed setting with software driver.
∗ Hardware and software chip disable capability.
∗ Supports power down feature.
• Meet PCI specification buffer strength.
• Supports CPU thermal detection.
• Supports CPU throttling and clock slow down.
• Supports software SMI and software stop clock port.
• Su pports Microsoft APM spec.
• Supports user register 32-bit.
• External hardware SMI request support.
∗ EXTSUSP, GPIO[3:0], PIO[6:0], UIP [2:0].
• Supports four Power Management Mode.
∗ Local auto doze mode.
∗ Global auto doze mode.
∗ Standby mode.
∗ Suspend mode.
• Supports programmable PMU timer.
∗ Seven sub-doze timer: 31mS/125mS/05.Sec/1Sec/1.5Sec/2Sec/3Sec.
∗ Standby timer: 4 sec ∼ 5 min.
∗ Suspend time: 1 min ∼ 60 min.