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EULUM DESIGN LLC 6131 • Kellers Church Road • Pipersville • PA • 18947 • USA
EULUM DESIGN LTD Unit 4 • Zone D •Chelmsford Road Ind. Est • Dunmow • CM6 1XG • UK
www.eulum.com
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RFM-CSB-3
3. PERIPHERAL BLOCKS
a. PWM
Any GPIO pin can be configured to output a PWM signal. Up to 4 PWM channels can be used
simultaneously. PWM frequency can be determined freely up to 40 kHz. By default the PWM
frequency is the same for all PWM channels. The maximum resolution is 400-1600 steps and
it depends on the PWM frequency. The PWM signal is logic level (max. VCC) and it has driving
capacity from 0,5 mA (standard) up to 15 mA (high-drive).
b. SPI
RFM-CSB-3 supports a 3-wire (SCK, MISO, MOSI) bidirectional SPI bus with fast data
transfers to and from multiple slaves. RFM-CSB-2 acts as a master and it provides a simple
CPU interface which includes a TXD register for sending data and an RXD register for
receiving data. These registers are double buffered to enable some degree of uninterrupted
data flow in and out of the SPI master.
Each of the slave devices requires an individual chip select signal which can be connected to
any available GPIO pin. The SPI master does not implement support for chip select directly.
Therefore the correct slave must be selected independently of the SPI master.
The GPIOs used for each SPI interface line can be chosen from any GPIO on the module and
are independently configurable. This enables great flexibility in module pinout and enables
efficient use of printed circuit board space and signal routing.
The SPI peripheral supports SPI modes 0, 1, 2, and 3.