User`s guide
Rev. 1.10 96 November 14, 2014 Rev. 1.10 97 November 14, 2014
HT66FW2230
Wireless Charger A/D Flash 8-Bit MCU
I
2
C Block Diagram
I
2
C Bus Communication
CommunicationontheI
2
Cbusrequiresfourseparatesteps,aSTARTsignal,aslavedeviceaddress
transmission,adatatransmissionandnallyaSTOPsignal.WhenaSTARTsignalisplacedonthe
I
2
Cbus,alldevicesonthebuswillreceivethissignalandbenotiedoftheimminentarrivalofdata
onthebus.TherstsevenbitsofthedatawillbetheslaveaddresswiththerstbitbeingtheMSB.
Iftheaddressoftheslavedevicematchesthatofthetransmittedaddress,theIICHAASbitinthe
IICC1registerwillbesetandanI
2
Cinterruptwillbegenerated.Afterenteringtheinterruptservice
routine,theslavedevicemustrstchecktheconditionoftheIICHAASbittodeterminewhetherthe
interruptsourceoriginatesfromanaddressmatchorfromthecompletionofan8-bitdatatransfer.
Duringadatatransfer,notethatafterthe7-bitslaveaddresshasbeentransmitted,thefollowingbit,
whichisthe8thbit,istheread/writebitwhosevaluewillbeplacedintheSRWbit.Thisbitwillbe
checkedbytheslavedevicetodeterminewhethertogointotransmitorreceivemode.Beforeany
transferofdatatoorfromtheI
2
Cbus,themicrocontrollermustinitialisethebus,thefollowingare
stepstoachievethis:
• Step1
SetCongurethepin-sharedI/OportstoI
2
Cpinfunction.(SCLandSDA).
• Step2
SetI2CENbitintheIICC0registerto“1”toenabletheI
2
Cbus.
• Step3
WritetheslaveaddressofthedevicetotheI
2
CbusaddressregisterIICA.
• Step4
SettheIICEinterruptenablebitoftheinterruptcontrolregistertoenabletheI
2
Cinterruptand
Multi-functioninterrupt.