User`s guide
Rev. 1.10 62 November 14, 2014 Rev. 1.10 63 November 14, 2014
HT66FW2230
Wireless Charger A/D Flash 8-Bit MCU
TM1C0 Register
Bit 7 6 5 4 3 2 1 0
Name T1PAU T1CK2 T1CK1 T1CK0 T1ON T1RP2 T1RP1 T1RP0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit7 T1PAU:TM1CounterPauseControl
0:Run
1:Pause
Thecountercanbepausedbysettingthisbithigh.Clearingthebittozerorestores
normalcounteroperation.WheninaPauseconditiontheTMwillremainpoweredup
andcontinuetoconsumepower.Thecounterwillretainitsresidualvaluewhenthisbit
changesfromlowtohighandresumecountingfromthisvaluewhenthebitchanges
toalowvalueagain.
Bit6~4 T1CK2~T1CK0:SelectTM1Counterclock
000:f
SYS
/4
001:f
SYS
010:f
H
/16
011:f
H
/64
100:f
SUB
101:f
SUB
110:TCK1risingedgeclock
111:TCK1fallingedgeclock
ThesethreebitsareusedtoselecttheclocksourcefortheTM1.Theexternalpinclock
sourcecanbechosentobeactiveontherisingorfallingedge.Theclocksourcef
SYS
isthesystemclock,whilef
H
istheHXToscillatorandf
SUB
istheinternalclock,the
detailsofwhichcanbefoundintheoscillatorsection.
Bit3 T1ON:TM1CounterOn/OffControl
0:Off
1:On
Thisbitcontrolstheoverallon/offfunctionoftheTM1.Settingthebithighenables
thecountertorun,clearingthebitdisablestheTM1.Clearingthisbittozerowill
stopthecounterfromcountingandturnofftheTM1whichwillreduceitspower
consumption.Whenthebitchangesstatefromlowtohightheinternalcountervalue
willberesettozero,howeverwhenthebitchangesfromhightolow,theinternal
counterwillretainitsresidualvalue.IftheTM1isintheCompareMatchOutput
ModethentheTM1outputpinwillberesettoitsinitialcondition,asspeciedbythe
T1OCbit,whentheT1ONbitchangesfromlowtohigh.
Bit2~0 T1RP2~T1RP0: TM1CCRP3-bitregister,comparedwiththeTM1Counterbit9~bit7
ComparatorPMatchPeriod
000:1024TM1clocks
001:128TM1clocks
010:256TM1clocks
011:384TM1clocks
100:512TM1clocks
101:640TM1clocks
110:768TM1clocks
111:896TM1clocks
ThesethreebitsareusedtosetupthevalueontheinternalCCRP3-bitregister,which
arethencomparedwiththeinternalcounter’shighestthreebits.Theresultofthis
comparisoncanbeselectedtocleartheinternalcounteriftheT1CCLRbitissetto
zero.SettingtheT1CCLRbittozeroensuresthatacomparematchwiththeCCRP
valueswillresettheinternalcounter.AstheCCRPbitsareonlycomparedwiththe
highestthreecounterbits,thecomparevaluesexistin128clockcyclemultiples.
Clearingallthreebitstozeroisineffectallowingthecountertooverflowatits
maximumvalue.