User`s guide

Rev. 1.10 34 November 14, 2014 Rev. 1.10 35 November 14, 2014
HT66FW2230
Wireless Charger A/D Flash 8-Bit MCU
IDLE2 Mode
TheIDLE2ModeisenteredwhenanHALTinstructionisexecutedandwhentheFHIDENbitinthe
SCCregisterishighandtheFSIDENbitintheSCCregisterislow.IntheIDLE2ModetheCPU
willbeswitchedoffbutthehighspeedoscillatorwillbeturnedontoprovideaclocksourcetokeep
someperipheralfunctionsoperational.
MCD (Missing Clock Detector) function
ThereisaMissingClockDetector,MCD,inthisdevice.TheMCDisusedtodetectthehighspeed
oscillatoroperationwhenthecorrespondingoscillatorisenabled.Iftheoscillatorisenabledandno
clockcycleisdetectedbytheMCDincertainperiodoftime,itmeansthattheoscillatordoesnot
oscillatesuccessfullyandthentheMCDwillgenerateasignaltoresetthemicrocontroller.
Control Register
Theregisters,SCC,HXTCandHIRCC,areusedtocontrolthesystemclockwithinthedevice.
SCC Register
Bit 7 6 5 4 3 2 1 0
Name CKS2 CKS1 CKS0 — FHS — FHIDEN FSIDEN
R/W R/W R/W R/W — R/W — R/W R/W
POR 0 1 0 — 0 — 0 0
Bit7~5 CKS2~CKS0:Thesystemclockselection
000:f
H
001:f
H
/2
010:f
H
/4
011:f
H
/8
100:f
H
/16
101:f
H
/32
110:f
H
/64
111:f
SUB
Thesethreebitsareusedtoselectwhichclockisusedasthesystemclocksource.In
additiontothesystemclocksourcedirectlyderivedfromf
H
orf
SUB
,adividedversion
ofthehighspeedsystemoscillatorcanalsobechosenasthesystemclocksource.
Bit4 Unimplemented,readas“0”
Bit3 FHS:Highfrequencyclockselection
0:HIRC
1:HXT
Bit2 Unimplemented,readas“0”
Bit1 FHIDEN:HighfrequencyoscillatorcontrolwhenCPUisswitchedoff
0:disable
1:enable
Thisbitisusedtocontrolwhetherthehighspeedoscillatorisactivatedorstopped
whentheCPUisswitchedoffbyexecutinganHALTinstruction.
Bit0 FSIDEN:LowfrequencyoscillatorcontrolwhenCPUisswitchedoff
0:disable
1:enable
Thisbitisusedtocontrolwhetherthelowspeedoscillatorisactivatedorstopped
whentheCPUisswitchedoffbyexecutinganHALTinstruction.WhentheLIRC
oscillatorisselectedtobethelowspeedoscillator,theLIRCoscillatorwillalsobe
controlledbythisbittogetherwiththeWDTfunctionenablecontrolbit.Whenthisbit
isclearedto0,buttheWDTfunctionisenabled,theLIRCoscillatorwillbeenabled.