Specifications

16 SAM0025A-062397 ESS Technology, Inc.
ES1879 DATA SHEET
INTERRUPTS
PRELIMINARY
INTERRUPTS
There are four interrupt sources in the ES1879:
Interrupt Sources
Interrupt sources are mapped to any one of the five
interrupt output pins via the PnP registers. A given pin can
have zero, one, or more interrupts mapped to it. Each PnP
pin is assigned to an ISA interrupt channel number by
Vendor-Defined Card-Level PnP registers 20h, 21h, and
22h. These registers are automatically loaded from the 8-
byte header in the PnP configuration data.
If a given interrupt pin has one or more sources assigned
to it, and one or more of those sources is activated
(register 30h, bit 0), then the interrupt pin will be active;
that is, it will always be driving high or low. Each interrupt
also has one or more mask bits that are AND'd with the
interrupt request.
Interrupt Status Register (ISR)
Port Config_Base+6h of the configuration device can be
read to quickly find the current state of ES1879 interrupt
sources. The following bits describe the state of the
ES1879 interrupt sources:
Bit 3 MPU-401 receive interrupt request AND’d
with bit 6 of mixer register 64h
Bit 2 Hardware volume interrupt request AND’d
with bit 1 of mixer register 64h
Bit 1 Audio 2 interrupt request AND’d with bit 6 of
Mixer Extension register 7Ah
Bit 0 Audio 1 interrupt request
Interrupt Mask Register (IMR)
Register 7h of the configuration device can be used to
mask any of the four interrupt sources.
The mask bits can be used to force the interrupt source to
be zero, but they do not put the interrupt pin in a high-
impedance state. Each bit is AND’d with the
corresponding interrupt source. This port is set to all ones
on a hardware reset.
The Interrupt Status Register (ISR) is not affected by the
state of the Interrupt Mask Register (IMR). That is, the ISR
reflects the status of the interrupt request lines before
being masked by the IMR.
The IMR is useful when interrupts are shared. For
example, assume that audio 1, audio 2, hardware volume,
and MPU-401 all share the same interrupt in Windows.
When returning from Windows to DOS, the hardware
volume, MPU-401, and Audio 2 interrupts can be masked
by setting the appropriate bits to 0.
Table 2 ES1879 Interrupt Sources
Interrupt Source Description
Audio 1 This interrupt is used for the first audio channel (Sound Blaster-compatible DMA, Extended mode DMA, and
Extended mode Programmed I/O), as well as SB-compatible (Sound Blaster-compatible) MIDI receive. This
interrupt request is cleared by a hardware or software reset, or by an I/O read from Audio_Base+Eh. The
interrupt request can be polled by reading from Audio_Base+Ch.
This interrupt is assigned to an interrupt
channel by PnP register 70h of LDN 1 (Logical Device Number 1).
Audio 2 Optional for the second DMA channel. The ES1879 can operate in full-duplex mode using two DMA channels.
However, the second DMA channel must have the same sample rate as the first DMA channel. For this rea-
son, it is not necessary to use a separate interrupt for the second DMA channel. This interrupt is masked by
bit 6 of mixer register 7Ah. It can be polled and cleared by reading or writing bit 7 of the same register. This
interrupt is assigned to an interrupt channel by PnP register 72h of LDN 1.
Hardware Volume This interrupt occurs when one of the three hardware volume controls generates an event. Bit 1 of mixer reg-
ister 64h is the mask bit for this interrupt.
The interrupt request can be polled by reading bit 3 of the
same register. The interrupt request is cleared by writing any value to register 66h. This interrupt is
assigned to an interrupt channel by PnP register 28h. Typically this interrupt, if used, is shared with
an audio interrupt.
MPU-401 This interrupt occurs when a MIDI byte is received. It will go low when a byte is read from the MIDI FIFO and
go high again quickly if there are additional bytes in the FIFO. The interrupt status is the same as the Read
Data Available status flag in the MPU-401 Status register.
This interrupt is masked by bit 6 of mixer reg-
ister 64h and is assigned to an interrupt channel in one of two ways: If the MPU-401 is part of the
audio device, then PnP register 28h is used to assign the MPU-401 interrupt. If the MPU-401 is its
own logical device, it can also be assigned to an interrupt via PnP register 70h of LDN 3. Both of
these methods access the same physical register.