Specifications

ESS Technology, Inc. SAM0023-122898 67
ES1869 DATA SHEET
REGISTERS
Controller Registers
This is a summary and description of the controller registers. These registers are written to and read from using
commands of the format Axh or Bxh. To enable access to these registers send the command C6h.
Controller Register Descriptions
Extended Mode Sample Rate Generator (A1h, R/W)
This register should be programmed for the sample rate
for all DAC operations in Extended mode.
The clock source for the sample rate generator is 397.7
kHz if bit 7 is 0 and 795.5 kHz if bit 7 is 1.
The sample rate is determined by the two’s complement
divider in bits 7:0.
Sample_Rate = 397.7 kHz / (128-x) if bit 7 = 0.
= 795.5 kHz / (256-x) if bit 7 = 1.
where x = value in bits 7:0 of register A1h.
Bit Definitions:
Table 25 ESS Controller Registers Summary
Reg D7 D6 D5 D4 D3 D2 D1 D0 Description
A1h Clock source Sample rate divider
A2h Filter clock divider
S/W reset, setup for 8
kHz sampling
A4h DMA transfer counter reload – low byte
A5h DMA transfer counter reload – high byte
A8h 0 0 0 1
Enable
record
monitor
0
Mono/stereo
select
Analog control
B1h
Game
compatible
IRQ
Enable IRQ
ovf Ext mode
DMA cntr
Enable IRQ for
FIFO1 HE status
edge
x Audio 1 interrupt
Legacy audio interrupt
control
B2h
Game
compatible
DRQ
Enable DRQ
for Ext mode
DMA
Enable DRQ game
compatible DMA
x Audio 1 DRQ Audio DRQ control
B4h Right Channel Record Level Left Channel Record Level Record Level
B5h DMA direct access holding – low byte
B6h DMA direct access holding – high byte
B7h
Enable FIFO
to/from
CODEC
Reserved. Set
opposite
polarity of bit 3
Data type select 1
Stereo/
Mono
mode
select
16-bit/8-bit
mode
select
0 1 Audio 1 control 1
B8h 0 0 0 0
Codec
mode
DMA mode
DMA
read/
write
Trans-
fer
enable
Audio 1 control 2
B9h 0 0 0 0 0 0 Transfer type Audio 1 transfer type
BAh 0
Disable time delay
on analog wake-up
Sign Adjust magnitude
Left channel ADC offset
adjust
BBh 0 Sign Adjust magnitude
Right channel ADC offset
adjust
Clock source Sample rate divider
7 6 5 4 3 2 1 0
Bits Name Description
7 Clock
source
1 = clock source is 795.5 kHz for sample
rates higher than 22 kHz.
0 = clock source is 397.7 kHz for sample
rates lower than or equal to 22 kHz.
6:0 Sample
rate divider
Signed sample rate divider.