Data Sheet

3. Functional Description

3.1. CPU

The ESP8266EX integrates a Tensilica L106 32-bit RISC processor, which achieves extra-

low power consumption and reaches a maximum clock speed of 160 MHz. The Real-Time

Operating System (RTOS) and Wi-Fi stack allow 80% of the processing power to be

available for user application programming and development. The CPU includes the

interfaces as below:

•

Programmable RAM/ROM interfaces (iBus), which can be connected with memory

controller, and can also be used to visit ﬂash.

• Data RAM interface (dBus), which can connected with memory controller.

• AHB interface which can be used to visit the register.

3.2. Memory

3.2.1. Internal SRAM and ROM

ESP8266EX Wi-Fi SoC integrates the memory controller and memory units including ROM

and SRAM. MCU can access the memory units through iBus, dBus, and AHB interfaces.

All memory units can be accessed upon request. A memory arbiter determines the running

sequence in the arrival order of requests.

According to our current version of SDK, the SRAM space available to users is assigned as

follows:

• RAM size < 50 kB, that is, when ESP8266EX is working in Station mode and

connects to the router, available space in the Heap + Data sector is around 50 kB.

• There is no programmable ROM in ESP8266EX, therefore, the user program must be

stored in an external SPI ﬂash.

3.2.2. SPI Flash

ESP8266EX supports SPI ﬂash. Theoretically speaking, ESP8266EX can support an up-

to-16-MB SPI ﬂash.

ESP-WROOM-02D and ESP-WROOM-02U currently integrate a 2-MB SPI ﬂash. ESP-

WROOM-02U supports these SPI modes: Standard SPI, DIO (Dual I/O), DOUT (Dual

Output), QIO (Quad I/O) and QOUT (Quad Output).

Espressif

! /! 5 22

Submit Documentation Feedback

2020.07