Data Sheet

4. PERIPHERALS AND SENSORS
Interface Signal Pin Function
Parallel QSPI
SPIHD SHD/SD2
Supports Standard SPI, Dual SPI, and
Quad SPI that can be connected to the
external flash and SRAM
SPIWP SWP/SD3
SPICS0 SCS/CMD
SPICLK SCK/CLK
SPIQ SDO/SD0
SPID SDI/SD1
HSPICLK IO14
HSPICS0 IO15
HSPIQ IO12
HSPID IO13
HSPIHD IO4
HSPIWP IO2
VSPICLK IO18
VSPICS0 IO5
VSPIQ IO19
VSPID IO23
VSPIHD IO21
VSPIWP IO22
General Purpose
SPI
HSPIQ_in/_out
Any GPIOs*
Standard SPI consists of clock,
chip-select, MOSI and MISO. These SPIs
can be connected to LCD and other
external devices. They support the
following features:
• both master and slave modes;
• 4 sub-modes of the SPI format
transfer that depend on the clock
phase (CPHA) and clock polarity
(CPOL) control;
• configurable SPI frequency;
• up to 64 bytes of FIFO and DMA.
HSPID_in/_out
HSPICLK_in/_out
HSPI_CS0_in/_out
HSPI_CS1_out
HSPI_CS2_out
VSPIQ_in/_out
VSPID_in/_out
VSPICLK_in/_out
VSPI_CS0_in/_out
VSPI_CS1_out
VSPI_CS2_out
JTAG
MTDI IO12
JTAG for software debugging
MTCK IO13
MTMS IO14
MTDO IO15
Espressif Systems 13 ESP32-WROVER Datasheet V1.2