Data Sheet

2. PIN DEFINITIONS
Name No. Type Function
NC 32 - -
IO21 33 I/O GPIO21, VSPIHD, EMAC_TX_EN
RXD0 34 I/O GPIO3, U0RXD, CLK_OUT2
TXD0 35 I/O GPIO1, U0TXD, CLK_OUT3, EMAC_RXD2
IO22 36 I/O GPIO22, VSPIWP, U0RTS, EMAC_TXD1
IO23 37 I/O GPIO23, VSPID, HS1_STROBE
GND 38 P Ground
2.3 Strapping Pins
ESP32 has five strapping pins, which can be seen in Chapter 6 Schematics:
• MTDI
• GPIO0
• GPIO2
• MTDO
• GPIO5
Software can read the value of these five bits from the register ”GPIO_STRAPPING”.
During the chip’s system reset (power-on reset, RTC watchdog reset and brownout reset), the latches of the
strapping pins sample the voltage level as strapping bits of ”0” or ”1”, and hold these bits until the chip is powered
down or shut down. The strapping bits configure the device boot mode, the operating voltage of VDD_SDIO and
other system initial settings.
Each strapping pin is connected with its internal pull-up/pull-down during the chip reset. Consequently, if a strap-
ping pin is unconnected or the connected external circuit is high-impendence, the internal weak pull-up/pull-down
will determine the default input level of the strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or apply the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32.
After reset, the strapping pins work as the normal functions pins.
Refer to Table 3 for detailed boot modes’ configuration by strapping pins.
Table 3: Strapping Pins
Voltage of Internal LDO (VDD_SDIO)
Pin Default 3.3V 1.8V
MTDI Pull-down 0 1
Booting Mode
Pin Default SPI Boot Download Boot
GPIO0 Pull-up 1 0
GPIO2 Pull-down Don’t-care 0
Debugging Log on U0TXD During Booting
Pin Default U0TXD Toggling U0TXD Silent
MTDO Pull-up 1 0
Espressif Systems 5 ESP32-WROVER Datasheet V1.2