Specifications

Rev. I BIOS Functions 5-25
MR series Technical Reference Manual
Advanced Chipset Features
The setup items related to the chipset are as follows.
Note:
1. Although each of the default values of SDRAM CAS Latency Time is "3," if a message stating that operations
can be performed with the setting of "2" appears in POST processing, it is possible to improve performance by
changing each of the values to "2."
2. For SDRAM Cycle Time Tras/Trc, SDRAM RAS-to-CAS Delay and SDRAM RAS Precharge Time, the settings of
both Fail-Safe and Optimized are fixed as "Auto"; they are display only items and cannot be selected.
Item Options Fail-Safe default Optimized default
SDRAM CAS Latency Time 3
2
3 3
System BIOS Cacheable Disabled
Enabled
Disabled Disabled
Video BIOS Cacheable Disabled
Enabled
Disabled Disabled
CPU Latency Timer Disabled
Enabled
Disabled Disabled
Delayed Transaction Disabled
Enabled
Enabled Enabled
CAS# Latency 2
3
33
Paging Mode Control Close
Open
Open Open
RAS-to-CAS Override by CAS# LT
Override (2)
by CAS# LT by CAS# LT
RAS# Timing Slow
Fast
Fast Fast
RAS# Precharge Timing Slow
Fast
Fast Fast