Specifications

S1D12200
Series
Rev. 1.4 EPSON 2–35
S1D12200 Series
(2) MPU Bus Write Timing (68 series)
Item Signal Symbol
Measuring
Min. Max. Unit
condition
Address setup time A0, CS t
AW6 Every timing is specified 60 ns
Address hold time t
AH6 on the basis of 20% and 30 ns
CS setup time t
AC6 80% of VSS.0ns
System cycle time WR t
CYC6 650 ns
Enable LOW pulse width (Write)
tEWL 150 ns
Enable HIGH pulse width (Write)
tEWH 450 ns
Data setup time D0 ~ D7 t
DS6 100 ns
Data hold time t
DH6 50 ns
[Ta = –30 to 85°C, VSS = –3.6 V to –2.4 V]
Item Signal Symbol
Measuring
Min. Max. Unit
condition
Address setup time A0, CS t
AW6 Every timing is specified 60 ns
Address hold time t
AH6 on the basis of 20% and 10 ns
CS setup time t
AC6 80% of VSS.0ns
System cycle time WR t
CYC6 500 ns
Enable LOW pulse width (Write)
tEWL 100 ns
Enable HIGH pulse width (Write)
tEWH 350 ns
Data setup time D0 to D7 t
DS6 100 ns
Data hold time t
DH6 20 ns
[Ta = –30 to 85°C, VSS = –3.3 V to –2.7 V]
*1: For the rise and fall of an input signal (tr and tf), set a value not exceeding 25ns (excluding RES input).
*2: t
EWH is specified based on an overlap period of CS LOW and E HIGH levels.
V
SS
× 0.8 [V]
V
SS
× 0.2 [V]
t
r
t
f
tCYC6
tAW6
tEWL
tAC6
tEWH
tAH6
tDS6
tDH6
E
CS
A0
D0 to D7