Specifications

2–34 EPSON Rev. 1.4
S1D12200 Series
11. TIMING CHARACTERISTICS
(1) MPU Bus Write Timing (80 series)
A0
WR
D0 to D7
t
AH8
t cyc8
t AC8
t AW8
t CCL
t CCH
t DS8
t DH8
CS
Item Signal Symbol
Measuring
Min. Max. Unit
condition
Address hold time A0, CS t
AH8 Every timing is specified 30 – ns
Address setup time t
AW8 on the basis of 20% and 60 – ns
CS setup time t
AC8 80% of VSS.0–ns
System cycle time WR t
CYC8 650 – ns
Write LOW pulse width (Write) tCCL 150 – ns
Write HIGH pulse width (Write) tCCH 450 – ns
Data setup time D0 to D7 t
DS8 100 – ns
Data hold time t
DH8 50 – ns
[Ta = –30 to 85°C, VSS = –3.6 V to –2.4 V]
Item Signal Symbol
Measuring
Min. Max. Unit
condition
Address hold time A0, CS t
AH8 Every timing is specified 10 – ns
Address setup time t
AW8 on the basis of 20% and 60 – ns
CS setup time t
AC8 80% of VSS.0–ns
System cycle time WR t
CYC8 500 – ns
Write LOW pulse width (Write) tCCL 100 – ns
Write HIGH pulse width (Write) tCCH 350 – ns
Data setup time D0 to D7 t
DS8 100 – ns
Data hold time t
DH8 20 – ns
[Ta = –30 to 85°C, VSS = –3.3 V to –2.7 V]
*1: For the rise and fall of an input signal (tr and tf), set a value not exceeding 25ns (excluding RES input).
*2:
tCCL is specified based on an overlap period of CS and WR LOW levels.
V SS × 0.8 [V]
V
SS × 0.2 [V]
t r t f