Specifications

S1D15300 Series
5–14 EPSON Rev.1.4
Booster circuit
If capacitors C1 are inserted between CAP1+ and CAP1-, between
CAP2+ and CAP2-, CAP1+ and CAP3- and VSS and VOUT, the
potential between VDD and VSS is boosted to quadruple toward the
negative side and it is output at VOUT.
For triple boosting, remove only capacitor C1 between CAP+1 and
CAP3- from the connection of quadruple boosting operation and
jumper between CAP3- and VOUT. The triple boosted voltage
appears at VOUT (CAP3-).
For double boosting, remove only capacitor C1 between CAP2+ and
CAP2- from the connection of triple boosting operation, open
CAP+2 and jumper between CAP2- and VOUT (CAP3-). The
double boosted voltage appears at VOUT (CAP3-, CAP2-).
For quadruple boosting, set a VSS voltage range so that the voltage
at VOUT may not exceed the absolute maximum rating.
As the booster circuit uses signals from the oscillator circuit, the
oscillator circuit must operate.
Subsection 10.1.1 gives an external wiring example to use master
and slave chips when on-board power supply is active.
V
REG
is the constant voltage source of the IC, and in case of Type 1,
it is constant and V
REG
–2.55 V (if V
DD
is 0 V), In case of Type 2,
V
REG
=V
SS
(V
DD
basis). To adjust the V
5
output voltage, insert a
variable resistor between V
R
, V
DD
and V
5
as shown. A combination
of R1 and R3 constant resistors and R2 variable resistor is
recommended for fine-adjustment of V
5
voltage.
Setup example of resistors R1, R2 and R3:
When the Electronic Volume Control Function is OFF (electronic
volume control register values are (D4,D3,D2,D1,D0)=(0,0,0,0,0)):
V
5 = V
REG
.......................
1
(As I
REF
= 0 A)
• R1 + R2 + R3 = 5MΩ ................................
2
(Determined by the current passing between V
DD
and V
5
)
• Variable voltage range by R2 V
5
= –6 to –10 V
(Determined by the LCD characteristics)
∆R2 = OΩ, V
REG
= –2.55V
To obtain V
5
= -10 V, from equation
1
:
R2 + R3 = 2.92 × R1 .....................
3
∆R2 = R2, V
REG
= –2.55V
To obtain V
5
= -6 V, from equation
1
:
1.35 × (R1 + R2) = R3 ..................
4
From equations
2
,
3
and
4
:
R1=1.27MΩ
R2=0.85MΩ
R3=2.88MΩ
The voltage regulator circuit has a temperature gradient of
approximately -0.2%/°C as the V
REG
voltage. To obtain another
temperature gradient, use the Electronic Volume Control Function
for software processing using the MPU.
As the V
R
pin has a high input impedance, the shielded and short
lines must be protected from a noise interference.
Voltage regulator using the Electronic Volume Control
Function
The Electronic Volume Control Function can adjust the intensity
(brightness level) of liquid crystal display (LCD) screen by command
control of V
5
LCD driver voltage.
This function sets five-bit data in the electronic volume control
register, and the V
5
LCD driver voltage can be one of 32-state
voltages.
To use the Electronic Volume Control Function, issue the Set Power
Control command to simultaneously operate both the voltage
regulator circuit and voltage follower circuit.
Also, when the boosting circuit is off, the voltage must be supplied
from V
OUT
terminal.
When the Electronic Volume Control Function is used, the V
5
voltage can be expressed as follows:
V
5
= (1 + ) V
REG
+ Rb × ∆I
REF
........................
5
Variable voltage range
The increased V
5
voltage is controlled by use of I
REF
current source
of the IC. (For 32 voltage levels, ∆I
REF
= I
REF
/31)
(V =+5V) V =0V
CC DD
(GND) V =-5V
SS
V =2V =-10V
SSOUT
Potential during double boosting
V =0V
DD
V =-3V
SS
V =3V =-12V
SSOUT
Potential during quadruple boosting
V =0V
DD
V =-5V
SS
V =3V =-15V
SSOUT
Potential during triple boosting
Voltage regulator circuit
The boosting voltage occurring at V
OUT
is sent to the voltage regulator and the V
5
liquid crystal display (LCD) driver voltage is output. This
V
5
voltage can be determined by the following equation when resistors Ra and Rb (R1, R2 and R3) are adjusted within the range of |V5| < |V
OUT
|.
V DD
V REG
R1
+
-
V
5 =(1+ ) V REG +I REF · Rb
Ra
R2
∆R2
VR I
REF
=(1+ ) V REG
R1+∆R2
R3+R2-∆R2
+I REF · (R3+R2-∆R2)
Rb
V 5
R3
Ra
Rb
( 1 + R3 + R2 – ∆R2)
R1 + ∆R2
Rb
Ra
.
=
.