Specifications

S1D15300 Series
Rev.1.4 EPSON 5–11
Relationship between display data RAM and addresses (if initial display line is 1CH):
Figure 4
Page
address
Data
Line
address
COM
output
D3, D2,
D1,D0
0,0,0,0
0,0,0,1
0,0,1,0
0,0,1,1
1,0,0,0
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
Page 1
Page 2
Page 3
Page 8
00
01
02
03
04
05
06
07
08
09
0A
10
11
12
13
14
15
16
17
18
19
1A
0B
0C
0D
0E
0F
1B
1C
1D
1E
1F
COM 0
COM 1
COM 2
COM 3
COM 4
COM 5
COM 6
COM 7
COM 8
COM 9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
COM27
COM28
COM29
COM30
COM31
COM32
COM33
COM34
COM35
COM36
COM37
COM38
COM39
COM40
COM41
COM42
COM43
COM44
COM45
COM46
COM47
COM48
COM49
COM50
COM51
COM52
COM53
COM54
COM55
COM56
COM57
COM58
COM59
COM60
COM61
COM62
COM63
COMS
Start
Column address
D0
Page 0
0,1,0,1
0,1,1,0
0,1,1,1
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
Page 5
Page 6
Page 7
Page 4
0,1,0,0
20
21
22
23
24
25
26
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
ADC
D0=
"0"
D0=
"1"
LCD
OUT
O0 O1 O2 O3 O4 O5 O6 O7
O128 O129 O130 O131
83 82 81 80
7F
7E
7D 7C
03 02 01 00
00 01 02 03 04 05 06 07 80 81 82 83
1/32
1/64
Page 8 is accessed during
1/65 or 1/33 duty.