MF424-21 S1D15000 Series Technical Manual IEEE1394 LCD driverController with RAM S1D15300 Series Technical Manual S1D15000 Series Technical Manual ELECTRONIC DEVICES MARKETING DIVISION EPSON Electronic Devices Website http://www.epson.co.jp/device/ This manual was made with recycle paper, and printed using soy-based inks. First issue December,1992 U Printed May,2001 in Japan H B 4.
In pursuit of “Saving” Technology, Epson electronic devices. Our lineup of semiconductors, liquid crystal displays and quartz devices assists in creating the products of our customers’ dreams. Epson IS energy savings. NOTICE No parts of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
The information of the product number change Starting April 1, 2001 the product number will be changed as listed below. To order from April 1, 2001 please use the new product number. For further information, please contact Epson sales representative.
Previous number SED1569DBB SED1570D0A SED1570D0B SED1575D0B SED1575D3B SED1575DAB SED1575T0* SED1575T0A SED1575T3* SED1577D0B SED1577D3B SED1577T0* SED1577T3* SED1578D0B SED157AD0B SED157ADAB SED157ADBB SED157AT0A SED15A6D0B SED15A6D1B SED15A6D2B SED15A6T0* SED15B1D0B SED15B1D1B SED15B1D2B SED15B1T0* New number S1D15609D11B* S1D15700D00A* S1D15700D00B* S1D15705D00B* S1D15705D03B* S1D15705D10B* S1D15705T00** S1D15705T00A* S1D15705T03** S1D15707D00B* S1D15707D03B* S1D15707T00** S1D15707T03** S1D15708D00B* S1
S1D15100 Series S1D15200 Series S1D15210 Series S1D15206 Series S1D15300 Series S1D15400 Series S1D15600/601/602 Series S1D15605 Series S1D15700 Series S1D15705 Series S1D15710 Series S1D15A06 Series S1D15B01 Series
CONTENTS Selection Guide 1. S1D15100 Series 2. S1D15200 Series 3. S1D15210 Series 4. S1D15206 Series 5. S1D15300 Series 6. S1D15400 Series 7. S1D15600/601/602 Series 8. S1D15605 Series 9. S1D15700 Series 10. S1D15705 Series 11. S1D15710 Series 12. S1D15A06 Series 13.
S1D15000 Series Selection Guide
■ LCD drivers with RAM for smalland medium-sized displays Ultra-low power consumption and on-chip RAM make this series ideal for compact LCDbased equipment. S1D15000 (SED1500) series Part number Supply voltage LCD voltage range (V) range (V) Duty Display Microprocessor Frequency Segment Common RAM (bits) interface (KHz) S1D15100D00C * (SED1510D 0C) S1D15100F00C* 0.9 to 6.0 (SED1510F0C) 1.8 to 6.0 1/4 32 4 128 bit Serial S1D15200***** 2.4 to 7.0 (SED1520* **) 3.
Part number Supply voltage LCD voltage range (V) range (V) S1D15303D15B* 2.4 to 6.
Part number S1D15606D11B* (SED1566D BB) S1D15606D00B* (SED1566D 0B) S1D15606D01B* (SED1566D 1B) S1D15606D02B* (SED1566D 2B) S1D15606T00A * (SED1566T0A ) S1D15607D11B* (SED1567D BB) S1D15607D00B* (SED1567D 0B) S1D15607D01B* (SED1567D 1B) S1D15607D02B* (SED1567D 2B) S1D15607T00B * (SED1567T0B ) S1D15607T00C* (SED1567T0C) S1D15608D11B* (SED1568D BB) S1D15608D00B* (SED1568D 0B) S1D15609D11B* (SED1569D BB) S1D15609D00B* (SED1569D 0B) S1D15609T**** (SED1569Txx *) S1D15A06D00B* (SED15A6D0B ) S1D15A06T00A* (SED15A6
5. S1D15300 Series Rev. 1.
Contents 1. DESCRIPTION ................................................................................................................................................ 5-1 2. FEATURES ...................................................................................................................................................... 5-1 3. BLOCK DIAGRAM (S1D15300D00B*) ........................................................................................................... 5-2 4. PAD LAYOUT .............
S1D15300 Series 1. DESCRIPTION The S1D15300 series is a single-chip LCD driver for dot-matrix liquid crystal displays (LCD’s) which is directly connectable to a microcomputer bus. It accepts 8-bit serial or parallel display data directly sent from a microcomputer and stores it in an on-chip display RAM. It generates an LCD drive signal independent of microprocessor clock.
S1D15300 Series 3.
S1D15300 Series 4. PAD LAYOUT S1D15300 series chips 51 1 52 172 Die No. 86 138 87 Rev.1.4 137 Chip Size: Pad Pitch: 6.65x4.57 mm 118 µm (Min.) S1D1530*D**A* Pad Center Size: Chip Thickness: (Al-pad chip) 90x90 µm 300 µm S1D1530*D**B* Bump Size: Bump Height: Chip Thickness: (Al-bump chip) 76x76 µm 23µm (Typ.
S1D15300 Series Pad Center Coordinates Unit: µm PAD No.
S1D15300 Series 5. PIN DESCRIPTION Power Supply Name I/O Description Number of pins VDD Supply +5V power supply. Connect to microprocessor power supply pin VCC. 2 VSS Supply Ground 1 V1, V2 V3, V4 V5 Supply LCD driver supply voltages. The voltage determined by LCD cell is impedance-converted by a resistive driver or an operational amplifier for application.
S1D15300 Series Name I/O Description Number of pins WR (R/W) I • Write enable input. When interfacing to an 8080-series microprocessor, WR is active LOW. • When interfacing to an 6800-series microprocessor, it will be read mode when R/W is HIGH and it will be write mode when R/W is LOW. R/W = “1”:Read R/W = “0”:Write 1 C86 I Microprocessor interface select terminal.
S1D15300 Series Name I/O On (SEG n) (Com n) O Description Number of pins LCD drive output. The following assignment is made depending on the model. S1D15300D00** S1D15300D10** S1D15300D15** S1D15301D00** S1D15302D00** S1D15302D14** S1D15302D11** S1D15303D15** S1D15304D14** S1D15305D10** SEG O0~O99 COM O100~O131 O16~O115 O0~O15, O116~O131 132 O0~O131 O0~O99 O100~O131 O32~O131 O8~O123 O0~O123 O18~O115 O0~O31 O0~O7, O124~O131 O124~O131 O0~O17, O116~O131 SEG output. LCD segment drive output.
S1D15300 Series 6. FUNCTIONAL DESCRIPTION Microprocessor Interface Interface type selection The S1D15300 series can transfer data via 8-bit bi-directional data buses (D7 to D0) or via serial data input (SI). When HIGH or LOW is selected for the polarity of P/S pin, either 8-bit parallel data input or serial data input can be selected as shown in Table 1. When serial data input is selected, RAM data cannot be read out.
S1D15300 Series Also, the microprocessor temporarily stores display data in bus holder, and stores it in display RAM until the next data write cycle starts. When viewed from the microprocessor, the S1D15300 series access speed greatly depends on the cycle time rather than access time to the display RAM (tACC). It shows the data transfer speed to/from the microprocessor can increase.
S1D15300 Series Column Address Counter This is a 8 bit presettable counter that provides column address to the display RAM (refer to Figure 4). It is incremented by 1 when a Read/ Write command is entered. However, the counter is not incremented but locked if a non-existing address above 84H is specified. It is unlocked when a column address is set again. The Column Address counter is independent of Page Address register.
S1D15300 Series Relationship between display data RAM and addresses (if initial display line is 1CH): 0,0,1,1 0,1,0,0 0,1,0,1 0,1,1,0 0,1,1,1 Column address 1,0,0,0 Page 1 Page 2 Page 3 Page 4 Page 5 Page 6 Page 7 Page 8 1/64 Start 1/32 COM output COM 0 COM 1 COM 2 COM 3 COM 4 COM 5 COM 6 COM 7 COM 8 COM 9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32 COM33 COM34 COM35 COM36 COM37 COM38 COM39 COM40
S1D15300 Series Output Status Selector The S1D15300 series except S1D15301 can set a COM output scan direction to reduce restrictions at LCD module assembly. This scan direction is set by setting “1” or “0” in the output status register D3. Fig.5 shows the status. Fig. 5 shows the status.
S1D15300 Series Example of S1D15300D00B* 1/33 duty • Dual-frame AC driver waveforms 32 33 1 2 3 4 5 6 28 29 30 31 32 33 1 2 3 4 5 CL FR DYO VDD V1 V4 V5 VDD V1 COM0 COM1 V4 V5 RAM data VDD V2 SEGn V3 V5 Fig. 6 The power circuit is controlled by Set Power Control command. This command sets a three-bit data in Power Control register to select one of eight power circuit functions. The external power supply and part of internal power circuit functions can be used simultaneously.
S1D15300 Series Booster circuit If capacitors C1 are inserted between CAP1+ and CAP1-, between CAP2+ and CAP2-, CAP1+ and CAP3- and VSS and VOUT, the potential between VDD and VSS is boosted to quadruple toward the negative side and it is output at VOUT. For triple boosting, remove only capacitor C1 between CAP+1 and CAP3- from the connection of quadruple boosting operation and jumper between CAP3- and VOUT. The triple boosted voltage appears at VOUT (CAP3-).
S1D15300 Series The minimum setup voltage of the V5 absolute value is determined by the ratio of external Ra and Rb, and the increased voltage by the Electronic Volume Control Function is determined by resistor Rb. Therefore, the resistors must be set as follows: S1D15300 Series V5 [V] -10V V5 1) Determine Rb resistor depending on the V 5 variable voltage range by use of the Electronic Volume Control.
S1D15300 Series Voltage generator circuit 1–1 Power set command when the built-in power supply is used (triple boosting) (D2, D1, D0) = (1, 1, 1) 1–2 when the on-chip power circuit is used 2 when VOUT is input from the outside (D2, D1, D0) = (0, 1, 1) VDD M/S CL CAP3C1 C1 C1 VSS CAP1+ C1 VSS C1 CAP1CAP2+ C1 C1 CAP2VOUT CAP3- CAP3VSS CAP1+ CAP2+ R2 CAP2- VOUT V5 S1D15300 series V1 V1 V1 V2 V2 V3 C2 V2 V3 C2 V3 V4 V4 V4 V5 V5 V5 4 when the on-chip power circuit is used VDD
S1D15300 Series Reference setup value: S1D15300 V5 = -7 to -9 V S1D15301 V5 = -11 to -13 V (variable) S1D15302 V5 = -11 to -13 V (variable) SED1530 SED1531 SED1532 C1 1.0~4.7 uF 1.0~4.7 uF 1.0~4.7 uF C2 0.22~0.47 uF 0.47~1.0 uF 0.47~1.0 uF R1 700 KΩ 1 MΩ 1 MΩ R2 200 KΩ 200 KΩ 200 KΩ R3 1.6 MΩ 4 MΩ 4 MΩ LCD SIZE 16 × 50 mm 32 × 64 mm 32 × 100 mm DOT CONFIGURATION 32 × 100 64 × 128 64 × 200 1: *2: C1 and C2 depend on the capacity of the LCD panel to be driven.
S1D15300 Series Exemplary connection diagram 1. Exemplary connection diagram 2.
S1D15300 Series 7. COMMANDS A0 The S1D15300 series uses a combination of A0, RD (E) and WR (R/ W) signals to identify data bus signals. As the chip analyzes and executes each command using internal timing clock only regardless of external clock, its processing speed is very high and its busy check is usually not required. The 8080 series microprocessor interface enters a read status when a low pulse is input to the RD pin and a write status when a low pulse is input to the WR pin.
S1D15300 Series (7) Read Display Data Reads 8-bit data from display RAM area specified by column address and page address. As the column address is incremented by 1 automatically after each write, the microprocessor can continue to read data of multiple words. A single dummy read is required immediately after column address setup. Refer to the display RAM section of FUNCTIONAL DESCRIPTION for details. Note that no display data can be read via the serial interface.
S1D15300 Series (13) End Cancels Read-Modify-Write mode and returns column address to the original address (when Read-Modify-Write was issued). A0 E R/W RD WR D7 0 1 0 D6 D5 D4 D3 D2 D1 D0 1 1 0 1 1 1 0 1 Return Column address N N+1 N+2 N+3 N+m N Read-Modify-Write mode is selected. (14) Reset Resets the Initial Display Line register, Column Address counter, Page Address register, and output status selector circuit to their initial status.
S1D15300 Series Sleep mode This mode stops every operation of the LCD display system, and can reduce current consumption nearly to a static current value if no access is made from the microprocessor. The internal status in the sleep mode is as follows: When an external power supply is used, likewise, the function of this external power supply must be stopped so that it may be fixed to floating or VDD level, prior to or concurrently with causing the S1D15300 series to go to the sleep mode or standby mode.
S1D15300 Series Command A0 RD WR D7 D6 Code D5 D4 1 0 D3 D2 D1 D0 1 1 1 0 1 Function (1) Display ON/OFF 0 1 0 1 0 (2) Initial Display Line 0 1 0 0 1 (3) Set Page Address 0 1 0 1 0 1 1 Page address (4) Set Column Address 4 higher bits 0 1 0 0 0 0 1 Higher column address Sets 4 higher bits of column address of display RAM in register (4) Set Column Address 4 lower bits 0 1 0 0 0 0 0 Lower column address Sets 4 lower bits of column address of display RAM
S1D15300 Series 8. COMMAND SETTING (For Refrence) Instruction Setup Examples Initial setup Note: As power is turned on, this IC outputs non-LCD-drive potentials V2 – V6 from SEG terminal (generates output for driving the LCD) and V1 – V 4 from COM terminal (also used for generating the LCD drive output). If charge remains on the smoothing capacitor being inserted between the above LCD driving terminals, the display screen can be blacked out momentarily.
S1D15300 Series • When the built-in power supply is not used immediately after the main power is turned on: Turn VDD and VSS power on with RES terminal being set to LOW. Wait until the power supply is stabilized. Cancel the reset mode (RES terminal = HIGH) Turn on the initial setup mode (Default) *1 The power save mode must be turned on within 5 ms from powering on.
S1D15300 Series • Data Display Initial setup is complete Function select through the commands (user setup) Display start line set *8 Page address set *9 Column address set *10 Function select through the command (user setup) Display data write *11 Function select through the command (user setup) Display ON/OFF *12 Data display is complete Notes: *8: Refer to the “Display Line Set” in the Command Description (2). *9: Refer to the “Page Address Set” in the Command Description (3).
S1D15300 Series 9. ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Unit –0.3 to +7.0 Supply voltage range Triple boosting VDD –0.3 to +6.0 Quadruple boosting V –0.3 to +4.5 Supply voltage range (1) (VDD Level) V5, VOUT –18.0 to +0.3 V Supply voltage range (2) (VDD Level) V1, V2, V3, V4 V5 to +0.3 V Input voltage range VIN –0.3 to VDD+0.3 V Output voltage range VO –0.3 to VDD+0.
S1D15300 Series 10. ELECTRICAL CHARACTERISTICS DC Characteristics VSS = 0 V, VDD = 5 V ±10%, Ta = –40 to +85°C unless otherwise noted. Item Power voltage (1) Symbol Recommended Operation Operational Condition VDD Min. Typ. Max. Unit Pin used 4.5 5.0 5.5 V VSS *1 2.4 – 6.0 Operating voltage Operational V5 VDD level (VDD = 0 V) –16.0 – –4.5 V V5 (2) Operational V1, V2 VDD level (VDD = 0 V) 0.4 × V5 – VDD V V1, V2 Operational V3, V4 VDD level (VDD = 0 V) V5 – 0.
S1D15300 Series Dynamic current consumption (1) when the built-in power supply is OFF Ta = 25°C Min. Typ. Max. S1D15300/ Item Symbol VDD = 5.0V, V5 – VDD = –8.0 V — 24 40 S1D15305 VDD = 3.0V, V5 – VDD = –8.0 V — 22 35 S1D15301 VDD = 5.0V, V5 – VDD = –11.0 V — 40 65 IDD VDD = 3.0V, V5 – VDD = –11.0 V — 36 60 (1) VDD = 5.0V, V5 – VDD = –11.0 V — 39 65 VDD = 3.0V, V5 – VDD = –11.0 V — 32 55 S1D15303 VDD = 3.0V, V5 – VDD = –5.0 V — 20 35 S1D15304 VDD = 3.
S1D15300 Series • Dynamic current consumption (2) when the LCD built-in power circuit lamp is ON 200 (uA) Condition: The built-in power circuit is ON. S1D15300/S1D15305: V5-VDD=–8.0 V, triple boosting S1D15301: V5-VDD=–11.0 V, quadruple boosting S1D15302: V5-VDD=–11.0 V, quadruple boosting S1D15303: V5-VDD=–5.0 V, dual boosting S1D15304: V5-VDD=–5.
S1D15300 Series • VSS and V5 operating voltage range -20 -16 [V] -15 V5-VDD -11 Operating range -10 -5 2.4 0 3.5 2 4 VDD 6 8 [V] Fig 10 • Current consumption at access IDD (2) - Microprocessor access cycle This indicates current consumption when data is always written on the checker pattern at fcyc. When no access is made, only IDD (1) occurs. 10 [mA] 1 S1D15301, S1D15302 IDD (2) 0.1 0.01 0 S1D15300, S1D15303, S1D15304, S1D15305 0.01 0.
S1D15300 Series AC Characteristics (1) System buses Read/write characteristics I (8080-series microprocessor) A0 tAW8 tAH8 CS1 (CS2="1") tCYC8 tCCLW tCCLR WR,RD tDS8 tDH8 tCCHW tCCHR D0~D7 (WRITE) tACC8 tCH8 D0~D7 (READ) VDD = 5.
S1D15300 Series (2) System buses Read/write characteristics II (6800-series microprocessor) A0 R/W tAH6 tAW6 CS1 (CS2="1") tEWHW tEWHR tCYC6 tEWLW tEWLR E tDS6 tDH6 D0~D7 (WR1TE) tACC6 D0~D7 (READ) tOH6 VDD = 5.
S1D15300 Series (3) Serial interface tCSS CS1 (CS2="1") tCSH tSAS tSAH A0 tSCYC tSLW SCL tf tSHW tr tSDH tSDS SI VDD = 5.0 V ±10%, Ta = –40 to +85°C Parameter Signal Symbol Serial clock cycle Serial clock HIGH pulse width Serial clock LOW pulse width SCL tSCYC tSHW tSLW tSAS tSAH tSDS tSDH tCSS tCSH Address setup time Address hold time A0 Data setup time Data hold time SI CS serial clock time CS Condition Min. Max.
S1D15300 Series (4) Display control timing CL (OUT) tDFR FR tDOH tDOL DYO VDD = 5.0 V ±10%, Ta = –40 to +85°C Output timing Parameter FR delay time DYO HIGH delay time Signal Symbol Condition Min. Typ. Max. Unit FR tDFR CL = 50 pF – 10 40 ns DYO tDOH – 40 100 ns tDOL – 40 100 ns DYO LOW delay time VSS = 0 V, VDD = 2.7 V to 4.5 V, Ta = –40 to +85°C Output timing Parameter FR delay time DYO HIGH delay time Signal Symbol Condition Min. Typ. Max.
S1D15300 Series 11. MPU INTERFACE (For Reference) The S1D15300 series chips can directly connect to 8080 and 6800-series microprocessors. Also, serial interfacing requires less signal lines between them. When multiple chips are used in the S1D15300 series they can be connected to the microprocessor and one of them can be selected by Chip Select.
S1D15300 Series 12. CONNECTION BETWEEN LCD DRIVERS The LCD panel display area can easily be expanded by use of multiple S1D15300 series chips. The S1D15300 series can also be connected to the common driver (S1D16305). S1D15301 to S1D16305 (S1D16305) VDD S11D16305 DOFF DIO FR S1D15301 (master) FR YSCL CL DYO M/S DOF S1D15300 to S1D15301 VDD S1D15300 (master) M/S CL DYO FR S1D15300 (slave) FR DOF CL DYO M/S VSS DOF S1D15302 to S1D15302 VDD S1D15302 (master) M/S CL Rev.1.
S1D15300 Series S1D15300 : 100×33dot SEG (100) SEG (100) S1D15300D00A* S1D15300D10A* COM (33) COM (17) S1D16700 COM (16) COM(65) 132×65 dot DOFF DIO YSCL FR SEG(132) FR CL DYO DOF VDD M/S S1D15301 S1D15302 : 200×65 dot SEG(100) SEG(100) S1D15302 COM(33) VDD 5–38 M/S FR DOF FR DOF CL CL EPSON S1D15302 COM(32) M/S Rev.1.
(Mold, marking area) (Mold, marking area) Rev.1.4 EPSON Output terminal pattern shape (Mold, marking area) IC center in the product. Specifications • Base: U-rexS, 75µm • Copper foil: Electrolytic copper foil, 35µm • Sn plating • Product pitch: 91P (42.75mm) • Solder resist positional tolerance: ±0.3 Note 1) Regist position tolerance = 0.3 Note 2) Product pitch: 9IP (42.75mm) Note 3) Lot No.
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In pursuit of “Saving” Technology, Epson electronic devices. Our lineup of semiconductors, liquid crystal displays and quartz devices assists in creating the products of our customers’ dreams. Epson IS energy savings. NOTICE No parts of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
MF424-21 S1D15000 Series Technical Manual IEEE1394 LCD driverController with RAM S1R75801F00A S1D15000 Series Technical Manual S1D15000 Series Technical Manual ELECTRONIC DEVICES MARKETING DIVISION EPSON Electronic Devices Website http://www.epson.co.jp/device/ This manual was made with recycle paper, and printed using soy-based inks. First issue December,1992 U Printed May,2001 in Japan H B 4.
