User`s manual

8: REGISTERS
1-64 EPSON S1D13504 SERIES HARDWARE FUNCTIONAL
SPECIFICATION (X19A-A-002-17)
8REGISTERS
8.1 Register Mapping
The S1D13504 registers are all memory mapped. The system must provide the external address
decoding through the CS# and M/R# input pins. When CS# = 0 and M/R# = 0, the registers are
mapped by address bits AB[5:0], e.g. REG[00h] is mapped to AB[5:0] = 000000, REG[01h] is
mapped to AB[5:0] = 000001. See the table below:
Table 8-1 S1D13504 Addressing
CS# M/R# Access
00
Register access:
• REG[00h] is addressed when AB[5:0] = 0
• REG[01h] is addressed when AB[5:0] = 1
• REG[n] is addressed when AB[5:0] = n
0 1 Memory access: the 2M byte display buffer is addressed by AB[20:0]
1 × S1D13504 not selected