User`s manual

7: A.C. CHARACTERISTICS
S1D13504 SERIES HARDWARE FUNCTIONAL EPSON 1-21
SPECIFICATION (X19A-A-002-17)
Figure 7-2 SH-3 Write Bus Timing
Note: The SH-3 Wait State Control Register for the area in which the S1D13504 resides must be set to a
non-zero value.
Note: 1.
If the S1D13504 host interface is disabled, the timing for WAIT# driven is relative to the falling edge
of CSn# or
the first positive edge of CKIO after A[20:0], M/R# becomes valid, whichever one is later.
Table 7-2 SH-3 Write Bus Timing
Symbol Parameter
3.3V
Units
Min. Max.
TCKIO Bus clock period 33 ns
t1
A[20:0], M/R# delay time 15 ns
t2
CSn# delay time 14 ns
t3
A[20:0], M/R# hold time 8 ns
t4
Read write hold time 0 ns
t5
Read write delay time 14 ns
t6
1
Falling edge of CSn# to WAIT# driven 0 11 ns
t7
Write Data hold time 1 0 ns
t8
Write Data delay time 17 ns
t9
Write Data hold time 2 0 ns
t10
BS# delay time 14 ns
t11
CKIO to WAIT# low 14 ns
t12
CKIO to WAIT# high 15 ns
t13
CSn# high to WAIT# high impedance 4 ns
t12
t13
t5
t1
t4
t3
t9
t2
t5
t10 t10
t7
Valid
t8
t13
Hi-Z
Hi-Z
Valid
t11
CKIO
A[20:0]
CSn#
RD/WR#
WE0#, WE1#
D[15:0]
BS#
WAIT#
M/R#
TCKIO
t6
Hi-Z
Hi-Z