User`s manual

6: INTERFACING TO THE TOSHIBA MIPS TX3912 PROCESSOR
5-44 EPSON APPLICATION NOTES (S19A-G-005-05)
6INTERFACING TO THE TOSHIBA MIPS
TX3912 PROCESSOR
6.1 Introduction
This application note describes the hardware and software environment required to provide an inter-
face between the S1D13504 Color Graphics LCD/CRT Controller and the Toshiba MIPS TX3912
Processor.
For further information on the S1D13504, refer to the “S1D13504 Hardware Functional Specifica-
tion”, document number S19A-A-002-xx.
For further information on the TX3912, contact Toshiba or refer to the Toshiba website under semi-
conductors at http://www.toshiba.com/taec/nonflash/indexproducts.html.
For further information on the ITE IT8368E, refer to the “IT8368E PC Card / GPIO Buffer Chip
Specification”.
6.1.1 General Description
The Toshiba MIPS TX3912 processor supports up to two PC Card (PCMCIA) slots. It is through
this host bus interface that the S1D13504 connects to the TX3912 processor.
The S1D13504 can be successfully interfaced using one of three configurations:
• Direct connection to TX3912 (see Section 1.2, “Direct Connection to the Philips PR31500/
PR31700” on page 2).
• System design using one ITE8368E PC Card/GPIO buffer chip (see Section 1.3.1, “Hardware
Description—Using One IT8368E” on page 4).
• System design using two ITE8368E PC Card/GPIO buffer chips (see Section 1.3.2, “Hardware
Description—Using Two IT8368E’s” on page 5).