User`s manual

2: INTERFACING TO THE NEC VR4102TM MICROPROCESSOR
APPLICATION NOTES (S19A-G-005-05) EPSON 5-9
2INTERFACING TO THE NEC VR4102
TM
MICROPROCESSOR
2.1 Introduction
This application note describes the hardware and software environment necessary to provide an
interface between the S1D13504 Color Graphics LCD/CRT Controller and the NEC VR4102
TM
Microprocessor (µPD30102).
For further information on either device refer to the respective technical specification.
2.1.1 General Description
The NEC VR4102
TM
Microprocessor is specifically designed to support an external LCD controller
by providing the internal address decoding and control signals necessary. By using this interface
only minimal external “glue” logic is necessary.
The diagram below shows a typical implementation.
Figure 2-1 NEC VR4102
TM
Configuration Schematic
Note: The propagation delay of the Read/write Decode Logic shown above must be less than 10 nsec.
WR#
SHB#
RD#
LCDCS#
LCDRDY
RSOUT
ADD[25:0]
DAT[15:0]
BUSCLK
WE0#
WE1#
RD0#
RD1#
CS#
WAIT#
M/R#
RESET#
AB[20:0]
DB[15:0]
BUSCLK
NEC VR4102 S1D13504
Read/Write
Decode Logic
Pull-up
A0
A0
A21