Specifications

S1C62N82 TECHNICAL HARDWARE EPSON I-87
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Melody Generator)
(k)End-of-melody signal generator
This is a circuit that receives the end-of-melody data
written on the melody ROM and generates the end-of-
melody signal which synchronized with the end of a note
playing. The output is entered into the controller and the
melody interrupt generator and becomes the source
signal which informs the end of a melody.
(l) Melody interrupt generator
The configuration of the melody interrupt generator is
shown in Figure 4.11.10. It is a circuit that receives the
end-of-melody signal from the end-of-melody signal
generator and generates the melody interrupt signal
which informs the CPU that a certain melody has been
completed. At the same time, it sets an interrupt factor
flag the timing of which is shown in Figure 4.11.11. The
interrupt factor flag becomes valid approximately 7.8 ms
(in case of normal speed) after the end-of-melody signal is
generated. The interrupt factor flag may be read out by
software and is reset simultaneously with the read out.
The register address is "ECH D0". It can also be masked
for the interrupt signal and masking can be controlled by
software. The mask register address is "E7H D0".
IMEL
EIMEL
Address "0ECH"
Address "0E7H"
Data bus
End-of-melody signal
Interrupt signal
Fig. 4.11.10
Melody interrupt generator