Specifications
I-86 EPSON S1C62N82 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Melody Generator)
(j) Interval generating circuit
The interval generating circuit generates the interval
(frequency) corresponding to the scale ROM output. Its
configuration is shown in Figure 4.11.9. Using the input
clock (32,768 Hz) to the melody generator or the 8-bit
divider with the booster output (65,536 Hz) as input
clock, dividing ratios (1/8–1/261) set by the scale ROM
output (S0–S7) can be attained. The divider output
passes through the output controller and becomes sound
output. Scales which can be output are C3–C6
#
(avail-
able output frequency range: 4,096 Hz–125.5 Hz; without
frequency booster) or C4–C7
#
(available output frequency
range: 8,192 Hz–251.1 Hz; with frequency booster). The
dividing ratio may be derived from S0–S7 values which
are the scale ROM output using the following equation:
N (dividing ratio) = (/S7 × 2
6
+ /S6 × 2
5
+ /S5 × 2
4
+ /S4 × 2
3
+ /S3
× 2
2
+ /S2 × 2
1
+ /S1 × 2
0
+3) × 2 + S0
(Note: /SX = reversed value of SX)
Example:
If
(S7, S6, S5, S4, S3, S2, S1, S0) = (1, 1, 1, 0, 0, 1, 0, 0),
then,
N = (0 × 2
6
+ 0 × 2
5
+ 0 × 2
4
+ 1 × 2
3
+ 1 × 2
2
+ 0 × 2
1
+ 1 × 2
0
+3)
× 2 + 0 = 32
In other words, if the input clock were 32,768 Hz, the
output will be 32,768/32 = 1,024 Hz (C6).
The selection of input clock may be done by changing the
switch (by mask option) explained in the section on
booster.
Divider (dividing ratio: 1/8–1/261)
Booster
output
To melody output
control circuit
S0–S7
Scale ROM output (8 bits)
Fig. 4.11.9
Interval generating circuit