Specifications

S1C62N82 TECHNICAL HARDWARE EPSON I-69
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (SVD Circuit and Heavy Load Protection Function)
SVDDT
SVDON SVD control on/off (0FAH D0)
When 0 is written: SVD detection off
When 1 is written: SVD detection on
Reading: Valid
When this bit is written, the SVD detection on/off operation
is controlled. Large current is drawn during SVD detection,
so keep SVD detection off except when necessary. When
SVDON is set to 1, SVD detection is executed. As soon as
SVDON is reset to 0, the detected result is loaded into the
SVDDT register.
SVD data (0FAH D1)
When 0 is read: Supply voltage Criteria voltage
When 1 is read: Supply voltage < Criteria voltage
When SVDDT is 1, the S1C62N82 enters the heavy load
protection mode. In this mode, the detection operation of
the SVD circuit is sampled in 2 Hz cycles and the respective
detection results are written to the SVDDT register.