Specifications

S1C62N82 TECHNICAL HARDWARE EPSON I-65

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (SVD Circuit and Heavy Load Protection Function)

If the source voltage is reduced by a heavy load while in the

heavy load protection mode, the rate of decrease can be

detected by hardware. After this, the heavy load is lost and

even when the heavy load protection mode is released by

software, the mode continues until the source voltage ex-

ceeds the voltage detected by the SVD circuit. Therefore,

malfunctioning due to a reduced source voltage can be

prevented completely.

Since supply voltage detection is automatically performed by

the hardware every 2 Hz (0.5 sec) when the heavy load

protection function operates, do not permit the operation of

the SVD circuit by the software in order to minimize power

current consumption.

HLMOD

SVDDT

SVDON

SVD

circuit

Regulated

voltage

circuit

Data bus

Address 0FAH

SVD

sampling

control

Fig. 4.9.1

Configuration of SVD and

heavy load protection circuits