Specifications

S1C62N82 TECHNICAL HARDWARE EPSON I-61
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Stopwatch Timer)
Table 4.8.1 shows the stopwatch timer control bits and their
addresses.
Table 4.8.1 Stopwatch timer control bits
Control of stopwatch
timer
Address Comment
Register
D3 D2 D1 D0 Name SR 1 0
0E2H
0E3H
SWL3 SWL2 SWL1 SWL0
SWH3 SWH2 SWH1 SWH0
R
R
SWL3
SWL2
SWL1
SWL0
0
0
0
0
SWH3
SWH2
SWH1
SWH0
0
0
0
0
MSB
Stopwatch timer
1/100 sec (BCD)
LSB
MSB
Stopwatch timer
1/10 sec (BCD)
LSB
0EAH
0 0 EISW1 EISW0
R
0
0
EISW1
EISW0
0
0
Interrupt mask register (stopwatch 1 Hz)
Interrupt mask register (stopwatch 10 Hz)
Enable
Enable
Mask
Mask
R/W
0EEH
0 0 ISW1 ISW0
R
0
0
ISW1
ISW0
0
0
Interrupt factor flag (stopwatch 1 Hz)
Interrupt factor flag (stopwatch 10 Hz)
Yes
Yes
No
No
0F9H
0 TMRST SWRUN SWRST
W
0
TMRST
SWRUN
SWRST
Reset
0
Reset
Clock timer reset
Stopwatch timer RUN/STOP
Stopwatch timer reset
Reset
Run
Reset
–
Stop
–
R/W WR