Specifications
I-60 EPSON S1C62N82 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Stopwatch Timer)
The 10 Hz (approximate 10 Hz) and 1 Hz interrupts can be
generated by the overflow of the SWL and SWH stopwatch
timers, respectively. Also, software can separately mask the
frequencies as described earlier.
Figure 4.8.3 is the timing chart for the stopwatch timer.
Interrupt function
Address
Address
Register bit
Stopwatch timer (SWL) timing chart
Stopwatch timer (SWH) timing chart
Occurrence of
10 Hz interrupt request
Occurrence of
1 Hz interrupt request
0E3H
(1/10 sec BCD)
0E2H
(1/100 sec BCD)
D0
D1
D2
D3
D0
D1
D2
D3
Register bit
Fig. 4.8.3
Timing chart for
stopwatch timer
As shown in Figure 4.8.3, the interrupts are generated by
the overflow of the respective timers (9 changing to 0). Also
when this happens, the corresponding interrupt factor flags
(ISW0, ISW1) are set to 1. The respective interrupts can be
masked separately with the interrupt mask registers
(EISW0, EISW1). However, regardless of the setting of the
interrupt mask registers, the interrupt factor flags are set to
1 by the overflow of the corresponding timers.
Reading of interrupt factor flags is available at EI, but be careful in
the following cases. If the interrupt mask register value corre-
sponding to the interrupt factor flags to be read is set to 1, an
interrupt request will be generated by the interrupt factor flags set
timing, or an interrupt request will not be generated.
Be very careful when interrupt factor flags are in the same address.
Note