Specifications

S1C62N82 TECHNICAL HARDWARE EPSON I-59
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Stopwatch Timer)
The stopwatch timer is configured as two four-bit BCD
timers, SWL and SWH. The SWL timer, at the stage preced-
ing the stopwatch timer, has an approximate 100 Hz signal
as its input clock. It counts up every 1/100 sec and gener-
ates an approximate 10 Hz signal. The SWH timer has an
approximate 10 Hz signal generated by the SWL timer for its
input clock. It counts up every 1/10 sec and generates a 1
Hz signal.
Figure 4.8.2 shows the count-up pattern of the stopwatch
timer.
Count-up pattern
Fig. 4.8.2
Count-up pattern of
stopwatch timer
SWL generates an approximate 10 Hz signal from the 256
Hz based signal. The count-up intervals are 2/256 sec and
3/256 sec, so that two final patterns are generated: a 25/
256 sec interval and a 26/256 sec interval. Consequently,
the count-up intervals are 2/256 sec and 3/256 sec, which
do not amount to an accurate 1/100 sec. SWH counts the
approximate 10 Hz signals generated by the 25/256 sec and
26/256 sec intervals in the ratio of 4:6 to generate a 1 Hz
signal. The count-up intervals are 25/256 sec and 26/256
sec, which do not amount to an accurate 1/10 sec.
26
256
26
256
26
256
26
256
26
256
26
256
25
256
25
256
25
256
25
256
3
256
2
256
3
256
2
256
2
256
2
256
3
256
3
256
3
256
2
256
3
256
2
256
3
256
3
256
3
256
3
256
3
256
2
256
2
256
2
256
26
256
25
256
26
256
25
256
x 6 +
x 4 = 1 (S)
0 1 2 3 4 5 6 7 8 9 0
0 1 2 3 4 5 6 7 8 9 0
0 1 2 3 4 5 6 7 8 9 0
1 Hz
signal
generation
Approximate
10 Hz
signal
generation
Approximate
10 Hz
signal
generation
SWH count value
Counting time (S)
(S)
(S)
SWL count value
Counting time (S)
SWL count value
Counting time (S)
SWH count-up pattern
SWL count-up pattern 1
SWL count-up pattern 2