Specifications

S1C62N82 TECHNICAL HARDWARE EPSON I-49
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (LCD Driver)
(1) Segment allocation
As shown in Figure 4.l.1, the S1C62N82 Series display
data is decided by the display data written to the display
memory (write-only) at address 090H–0DFH.
The address and bits of the display memory can be made
to correspond to the segment pins (SEG0–SEG41) in any
combination through mask option. This simplifies design
by increasing the degree of freedom with which the liquid
crystal panel can be designed.
Figure 4.6.5 shows an example of the relationship be-
tween the LCD segments (on the panel) and the display
memory in the case of 1/4 duty.
Mask option
(segment allocation)
Fig. 4.6.5
Segment allocation
a
f
g
e
d
p
c
SEG10 SEG11
Common 0
Common 1
Common 2
0A0H
0A1H
Address
d
p
D3
c
g
D2
b
f
D1
a
e
D0
Data
Display data memory allocation
SEG10
SEG11
A1, D1
(f)
A0, D0
(a)
A1, D0
(e)
A1, D2
(g)
A0, D2
(c)
A0, D1
(b)
Pin address allocation
Common 0 Common 1 Common 2
A0, D3
(d)
A1, D3
(p)
Common 3
Common 3
b