Specifications

S1C62N82 TECHNICAL HARDWARE EPSON I-39
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Output Ports)
Table 4.4.3 lists the output port control bits and their ad-
dresses.
Table 4.4.3 Control bits of output ports
Control of output
ports
Output port data (0F3H, 0F4H D0–D2)
Sets the output data for the output ports.
When 1 is written: High output
When 0 is written: Low output
Reading: Valid
The output port pins output the data written to the corre-
sponding registers (R00–R03, R10–R12) without changing it.
When 1 is written to the register, the output port pin goes
high (VDD), and when 0 is written, the output port pin goes
low (VSS). After an initial reset, all registers are set to 0.
R00–R03, R10–R12
(DC output)
Address Comment
Register
D3 D2 D1 D0 Name SR 1 0
0F3H
R03 R02 R01 R00
R03
R02
R01
R00
0
0
0
0
High
High
High
High
Low
Low
Low
Low
Output port data (R00–R03)
R/W
0F4H
R12
MO
ENV
R11
R10
FOUT
R/W
MELD
R12
MO
ENV
R11
R10
FOUT
Melody output mask
Output port data (R12)
Inverting melody output
Melody envelope control
Output port data (R11)
Output port data (R10)
Frequency output
Disable
High
–
–
High
High
ON
Enable
Low
–
–
Low
Low
OFF
0
0
–
Hz
0
0
MELD