Specifications

I-34 EPSON S1C62N82 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
Input comparison registers (0E5H, 0E6H D0)
The interrupt conditions for pins K00–K03 and K10 can be
set with these registers.
When 1 is read: Falling edge
When 0 is read: Rising edge
Reading: Valid
Of the five bits of the input ports, the interrupt conditions
can be set for the rising or falling edge of the input for each
of the five bits (K00–K03 and K10) through the input com-
parison registers (KCP00–KCP03 and KCP10).
After an initial reset, these registers are set to 0.
Interrupt mask registers (0E8H, 0E9H D0)
Masking the interrupt of the input port pins can be done
with these registers.
When 1 is written: Enable
When 0 is written: Mask
Reading: Valid
With these registers, masking of the input port bits can be
done for each of the five bits. After an initial reset, these
registers are all set to 0.
Writing to these registers should be done only in the DI
status (interrupt flag = 0). Otherwise, it causes malfunction.
Interrupt factor flags (0EDH D0 and D1)
These flags indicate the occurrence of an input interrupt.
When 1 is read: Interrupt has occurred
When 0 is read: Interrupt has not occurred
Writing: Invalid
The interrupt factor flags IK0 and IK1 are associated with
K00–K03 and K10, respectively. From the status of these
flags, the software can decide whether an input interrupt
has occurred.
These flags are reset when the software has read them.
KCP00–KCP03, KCP10
EIK00–EIK03, EIK10
K0, IK1