Specifications

I-14 EPSON S1C62N82 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
CHAPTER 4 PERIPHERAL CIRCUITS AND
OPERATION
Peripheral circuits (timer, I/O, and so on) of the S1C62N82
Series are memory mapped. Thus, all the peripheral circuits
can be controlled by using memory operations to access the
I/O memory. The following sections describe how the pe-
ripheral circuits operate.
Memory Map
The data memory of the S1C62N82 Series has an address
space of 250 words, of which 80 words are allocated to
display memory and 26 words, to I/O memory. Figure 4.1.1
show the overall memory mas for the S1C62N82 Series, and
Tables 4.1.1 (a)–(g), the memory maps for the peripheral
circuits (I/O space).
4.1
Address
Page High
Low
0123456789ABCDE
F
M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF
3
0
1
2
4
5
6
7
8
9
A
B
C
D
E
F
0
RAM area (000H–08FH)
144 words x 4 bits (R/W)
I/O memory area Table 4.1.1 (a)–(g)
Display memory area (090H–0DFH)
80 words x 4 bits (R/W)
Unused area
*
* If the duty of the LCD driver is set to 1/8 by the mask
option in the display memory area (80 words × 4 bits), 304
bits (38 segments × 8 common bits) are used. If the duty
is set to 1/4, 168 bits (42 segments × 4 common bits) are
used. The bits unassigned as display memory can serve
as a general-purpose RAM.
Fig. 4.1.1
Memory map
Memory is not mounted in unused area within the memory map
and in memory area not indicated in this chapter. For this reason,
normal operation cannot be assured for programs that have been
prepared with access to these areas.
Note