Specifications

S1C62N82 TECHNICAL SOFTWARE EPSON II-89
CHAPTER 4: SUMMARY OF PROGRAMMING POINTS
CHAPTER 4 SUMMARY OF PROGRAMMING
POINTS
Core CPU After the system reset, only the program counter (PC),
new page pointer (NPP) and interrupt flag (I) are initial-
ized by the hardware. The other internal circuits whose
settings are undefined must be initialized with the pro-
gram.
Power Supply External load driving through the output voltage of con-
stant voltage circuit or booster circuit is not permitted.
Data Memory Since some portions of the RAM are also used as stack
area during sub-routine call or register saving, see to it
that the data area and the stack area do not overlap.
The stack area consumes 3 words during a sub-routine
call or interrupt.
Address 00H–0FH in the RAM is the memory register area
addressed by the register pointer RP.
Memory is not mounted in unused area within the mem-
ory map and in memory area not indicated in this man-
ual. For this reason, normal operation cannot be assured
for programs that have been prepared with access to
these areas.
Initial Reset When utilizing the simultaneous high input reset func-
tion of the input ports (K00–K03), take care not to make
the ports specified during normal operation to go high
simultaneously.
It takes at least 5 ms from the time the OSC3 oscillation
circuit goes ON until the oscillation stabilizes. Conse-
quently, when switching the CPU operation clock from
OSC1 to OSC3, do this after a minimum of 5 ms have
elapsed since the OSC3 oscillation went ON.
Further, the oscillation stabilization time varies depend-
ing on the external oscillator characteristics and condi-
tions of use, so allow ample margin when setting the wait
time.
Oscillation Circuit