Specifications

II-88 EPSON S1C62N82 TECHNICAL SOFTWARE
CHAPTER 3: PERIPHERAL CIRCUITS (Interrupt and Halt)
All interrupts are enabled, and the priority when all inter-
rupts are generated simultaneously is determined by hard-
ware as follows:
(highest priority) Melody interrupt → K10 interrupt → K00–
K03 interrupt → stopwatch interrupt → timer interrupt
(lowest priority)
The two stopwatch interrupts (1 Hz, 10 Hz) have the same
vector address (104H). The priority is decided by software;
the stopwatch interrupt service routine first checks the 1 Hz
interrupt factor flag, so the priority is (high priority) stop-
watch 1 Hz interrupt → stopwatch 10 Hz interrupt (low
priority).
The three timer interrupts (2 Hz, 8 Hz, 32 Hz) have the same
vector address (102H). The priority is decided by software;
the timer interrupt service routine first checks the 2 Hz
interrupt factor flag, then 8 Hz, and finally 32 Hz, so the
priority is (first priority) timer 2 Hz interrupt → (second
priority) timer 8 Hz interrupt → (third priority) timer 32 Hz
interrupt.
Reading of interrupt factor flags is available at EI, but be
careful in the following cases.
If the interrupt mask register value corresponding to the
interrupt factor flags to be read is set to 1, an interrupt
request will be generated by the interrupt factor flags set
timing, or an interrupt request will not be generated.
Be very careful when interrupt factor flags are in the same
address.