Specifications

II-82 EPSON S1C62N82 TECHNICAL SOFTWARE
CHAPTER 3: PERIPHERAL CIRCUITS (Interrupt and Halt)
• Interrupt vector address
The S1C62N82 interrupt vector address is made up of the
low-order 4 bits of the program counter (12 bits), each of
which is assigned a specific function as shown in Table
3.12.2.
Table 3.12.2 Assignment of the interrupt vector address
As shown in Table 3.12.2, the lower order 4 bits of the
program counter are set according to which of the interrupts
occurs. In other words, the interrupt vector address is set at
page 1, steps 02H, 04H, 06H, 08H, 0AH.
Note that all of the three timer interrupts have the same
vector address, and software must be used to judge whether
or not a given timer interrupt has occurred. For instance,
when the 32 Hz timer interrupt and the 8 Hz timer interrupt
are enabled at the same time, the accepted timer interrupt
must be identified by software. (Similarly, the K00–K03
input interrupts and the 10 Hz/1 Hz stopwatch interrupts
must be identified by software.)
When an interrupt is generated, the hardware resets the
interrupt flag (I) to enter the DI state. Execute the EI in-
struction as necessary to recover the EI state after interrupt
processing.
0
0
0
0
0
PCP3
0
0
0
0
0
PCP2
0
0
0
0
0
PCP1
1
1
1
1
1
PCP0
0
0
0
0
0
PCS7
0
0
0
0
0
PCS6
0
0
0
0
0
PCS5
0
0
0
0
0
PCS4
1
1
0
0
0
PCS3
0
0
1
1
0
PCS2
1
0
1
0
1
PCS1
0
0
0
0
0
PCS0Interrupt Item
Melody
K10
K03–K00
Stopwatch
Timer
10A
108
106
104
102
Interrupt
Vector Address
Highest
Lowest
Priority