Specifications

II-52 EPSON S1C62N82 TECHNICAL SOFTWARE
CHAPTER 3: PERIPHERAL CIRCUITS (SVD Circuit and Heavy Load Protection Function)
• Operation through the SVDON register
Label Mnemonic/Operand Comment
LD X,0FAH ;Sets the HLMOD/SVDDT address
FAN MX,1010B ;Checks the HLMOD/SVDDT bits
JP NZ,HLMOD ;Heavy load protection mode
OR MX,0001B ;Sets the SVDON to "1"
AND MX,1110B ;Sets the SVDON to "0"
FAN MX,0010B ;Checks the SVDDT bit
JP Z,HLMOD ;Shifts the mode to
;the heavy load protection mode
LD Y,FLAG
AND MY,0 ;Resets the flag to "0"
RET
;
HLMOD: LD Y,FLAG
OR MY,1 ;Sets the flag to "1"
RET
The above program operates the heavy load protection
function by using the SVDON register. In the normal
operation mode, supply voltage detection is done from the
SVDON register and when the supply voltage drops below
the criteria voltage, the mode shifts to the heavy load
protection mode. In the heavy load protection mode,
supply voltage detection by the hardware is done every 2
Hz and the detection result is stored in the SVDDT regis-
ter. Because of this, the SVDDT register will be "1" during
the heavy load protection mode. Moreover, in the above
program, supply voltage detection by the SVDON is
halted during the heavy load protection mode. If the
supply voltage become grater than the criteria voltage,
the SVDDT register value will become "0" and hence,
supply voltage detection through the SVDON register will
resume after checking the SVDDT register value. When
used as a sub-routine, the above program will enable the
user to determine whether the present operation mode is
the normal operation mode (flag = "0") or the heavy load
protection mode (flag = "1").
The flow chart for the above program is shown in the next
page.