Product specifications

S5U1C6S3N2E2 MANUAL EPSON 13
(EVALUATION BOARD FOR S1C60N09/6S3N2/62N33)
6 PRECAUTIONS
<Protective diode at each port>
The S5U1C6S3N2E2 I/O ports are all connected to V
DD and VSS through a protective diode and the
interface voltage with the target system is fixed at +5 V. Therefore, the ports cannot interface with a
voltage level exceeding V
DD–VSS even when the output specification is set to open-drain output.
<Pull-down resistance>
The K ports of the S5U1C6S3N2E2 have a 1 MΩ pull-down resistor and the P ports have a 200 kΩ
pull-down resistor which are different from those of the actual IC. For the resistor value of the actual
IC, refer to the Technical Manual for each model.
The set-up time when the input port is pulled down to low with the pull-down resistor is different
from the actual IC. For example, when a key matrix circuit is configured with input and output ports,
a delay occurs in the input fall time by the pull-down resistor. Note that the delay time between the
S5U1C6S3N2E2 and the actual IC is not same.
■ LCD
• The S5U1C6S3N2E2 has the VADJ control for adjusting the LCD contrast. In the actual IC, the LCD
drive voltage level is fixed.
• The S5U1C6S3N2E2 can output 1/3-bias waveforms only, and cannot output 1/2-bias waveforms.
• The output drive capability of the SEG and COM terminals is different.
• When a SEG terminal is set to DC output, the output level is not be initialized in the S5U1C6S3N2E2.
However, it is initialized in the S1C6S3N2 and S1C60N09. In the S1C62N33, it is not initialized similar
to the S5U1C6S3N2E2, but the undefined status is different from the S5U1C6S3N2E2.
■ Difference in current consumption
Current consumption in the S5U1C6S3N2E2 greatly differs from that in the actual IC. To evaluate the
approximate current consumption of the actual IC, check the LEDs on the S5U1C6S3N2E2. The
following lists the items that greatly affect the amount of current consumption:
• Those that can be estimated by checking LEDs and monitor pins
a) Run and Halt execution ratio (on the ICE)
b) AMP operation (AMPON)*
c) OSC3 oscillation ON/OFF circuit (OSCC)*
d) SVD circuit ON/OFF circuit (SVDON or BLS)*
e) Heavy load protection mode (HVLD or HLMOD)
• Those that require attention during system and software design
f) Currents consumed by the internal pull-down resistors
g) Input ports in a floating state
■ Functional difference
<SVD (BLD) circuit>*
• The SVD (BLD) function is implemented by varying the apparent power supply voltage with the
VSVD volume on the S5U1C6S3N2E2 board.
• There is a delay between the time change the power supply voltage and the SVD (BLD) data is
detected. For the S5U1C6S3N2E2, it is shorter than the actual IC. For the actual IC, refer to the Techni-
cal Manual of each model and detect the voltage after the sufficient time interval.
<AMP circuit>*
There is a delay between the time change the voltage of the AMP pins and the AMP data is detected.
For the S5U1C6S3N2E2, it is shorter than the actual IC. For the actual IC, refer to the Technical Manual
of each model and choose the sufficient time interval.